[Mesa-dev] [PATCH] radeonsi: don't flush and wait for CB after depth-only rendering

[Nicolai Hähnle]

Looks good!

Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>


On 26.06.2017 02:49, Marek Olšák wrote:
> From: Marek Olšák <marek.olsak at amd.com>
> 
> ---
>   src/gallium/drivers/radeonsi/si_state.c | 5 ++++-
>   1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
> index 0f39ede..b236bed 100644
> --- a/src/gallium/drivers/radeonsi/si_state.c
> +++ b/src/gallium/drivers/radeonsi/si_state.c
> @@ -2528,22 +2528,25 @@ static void si_set_framebuffer_state(struct pipe_context *ctx,
>   	 * Wait for compute shaders because of possible transitions:
>   	 * - FB write -> shader read
>   	 * - shader write -> FB read
>   	 *
>   	 * DB caches are flushed on demand (using si_decompress_textures).
>   	 *
>   	 * When MSAA is enabled, CB and TC caches are flushed on demand
>   	 * (after FMASK decompression). Shader write -> FB read transitions
>   	 * cannot happen for MSAA textures, because MSAA shader images are
>   	 * not supported.
> +	 *
> +	 * Only flush and wait for CB if there is actually a bound color buffer.
>   	 */
> -	if (sctx->framebuffer.nr_samples <= 1) {
> +	if (sctx->framebuffer.nr_samples <= 1 &&
> +	    sctx->framebuffer.state.nr_cbufs) {
>   		sctx->b.flags |= SI_CONTEXT_INV_VMEM_L1 |
>   				 SI_CONTEXT_INV_GLOBAL_L2 |
>   				 SI_CONTEXT_FLUSH_AND_INV_CB;
>   	}
>   	sctx->b.flags |= SI_CONTEXT_CS_PARTIAL_FLUSH;
>   
>   	/* u_blitter doesn't invoke depth decompression when it does multiple
>   	 * blits in a row, but the only case when it matters for DB is when
>   	 * doing generate_mipmap. So here we flush DB manually between
>   	 * individual generate_mipmap blits.
> 


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