[Mesa-dev] [PATCH 08/92] nir: add nir_lower_uniforms_to_ubo pass
Nicolai Hähnle
nhaehnle at gmail.com
Mon Jun 26 14:09:47 UTC 2017
From: Nicolai Hähnle <nicolai.haehnle at amd.com>
This is an alternative lowering of default-block uniforms that doesn't
use uniform load intrinsics. Instead, it translates the loads to UBO
loads, allowing a simpler backend.
---
src/compiler/Makefile.sources | 1 +
src/compiler/nir/nir.h | 1 +
src/compiler/nir/nir_lower_uniforms_to_ubo.c | 140 +++++++++++++++++++++++++++
3 files changed, 142 insertions(+)
create mode 100644 src/compiler/nir/nir_lower_uniforms_to_ubo.c
diff --git a/src/compiler/Makefile.sources b/src/compiler/Makefile.sources
index 5f4440b..a0a0d62 100644
--- a/src/compiler/Makefile.sources
+++ b/src/compiler/Makefile.sources
@@ -230,20 +230,21 @@ NIR_FILES = \
nir/nir_lower_patch_vertices.c \
nir/nir_lower_phis_to_scalar.c \
nir/nir_lower_regs_to_ssa.c \
nir/nir_lower_returns.c \
nir/nir_lower_samplers.c \
nir/nir_lower_samplers_as_deref.c \
nir/nir_lower_system_values.c \
nir/nir_lower_tex.c \
nir/nir_lower_to_source_mods.c \
nir/nir_lower_two_sided_color.c \
+ nir/nir_lower_uniforms_to_ubo.c \
nir/nir_lower_vars_to_ssa.c \
nir/nir_lower_var_copies.c \
nir/nir_lower_vec_to_movs.c \
nir/nir_lower_wpos_center.c \
nir/nir_lower_wpos_ytransform.c \
nir/nir_metadata.c \
nir/nir_move_vec_src_uses_to_dest.c \
nir/nir_normalize_cubemap_coords.c \
nir/nir_opt_conditional_discard.c \
nir/nir_opt_constant_folding.c \
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 779bf58..c21ecc5 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -2568,20 +2568,21 @@ void nir_lower_drawpixels(nir_shader *shader,
typedef struct nir_lower_bitmap_options {
unsigned sampler;
bool swizzle_xxxx;
} nir_lower_bitmap_options;
void nir_lower_bitmap(nir_shader *shader, const nir_lower_bitmap_options *options);
bool nir_lower_atomics(nir_shader *shader,
const struct gl_shader_program *shader_program);
bool nir_lower_atomics_to_ssbo(nir_shader *shader, unsigned ssbo_offset);
+bool nir_lower_uniforms_to_ubo(nir_shader *shader);
bool nir_lower_to_source_mods(nir_shader *shader);
bool nir_lower_gs_intrinsics(nir_shader *shader);
typedef enum {
nir_lower_imul64 = (1 << 0),
nir_lower_isign64 = (1 << 1),
/** Lower all int64 modulus and division opcodes */
nir_lower_divmod64 = (1 << 2),
} nir_lower_int64_options;
diff --git a/src/compiler/nir/nir_lower_uniforms_to_ubo.c b/src/compiler/nir/nir_lower_uniforms_to_ubo.c
new file mode 100644
index 0000000..63f3bc8
--- /dev/null
+++ b/src/compiler/nir/nir_lower_uniforms_to_ubo.c
@@ -0,0 +1,140 @@
+/*
+ * Copyright 2017 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * on the rights to use, copy, modify, merge, publish, distribute, sub
+ * license, and/or sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * Remap uniform variable accesses to UBO accesses of UBO binding point 0, with
+ * the offset determined by std140 layout, with the base address given by
+ * variable->data.driver_location (in 16-byte units).
+ *
+ * Simultaneously, remap existing UBO accesses by increasing their binding
+ * point by 1.
+ */
+
+#include "nir.h"
+#include "nir_builder.h"
+
+static nir_ssa_def *
+get_deref_offset(nir_deref *tail, nir_ssa_def *offset, nir_builder *b)
+{
+ while (tail->child != NULL) {
+ const struct glsl_type *parent_type = tail->type;
+ tail = tail->child;
+
+ if (tail->deref_type == nir_deref_type_array) {
+ nir_deref_array *deref_array = nir_deref_as_array(tail);
+
+ assert(deref_array->deref_array_type != nir_deref_array_type_wildcard);
+
+ unsigned size = 16 * glsl_count_attribute_slots(tail->type, false);
+
+ nir_ssa_def *cur_offset = nir_imm_int(b, deref_array->base_offset);
+ if (deref_array->deref_array_type == nir_deref_array_type_indirect) {
+ cur_offset = nir_iadd(b, cur_offset,
+ nir_ssa_for_src(b, deref_array->indirect, 1));
+ }
+
+ offset = nir_iadd(b, offset,
+ nir_imul(b, cur_offset, nir_imm_int(b, size)));
+ } else if (tail->deref_type == nir_deref_type_struct) {
+ nir_deref_struct *deref_struct = nir_deref_as_struct(tail);
+
+ unsigned cur_offset = 0;
+ for (unsigned i = 0; i < deref_struct->index; i++) {
+ const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
+ cur_offset += 16 * glsl_count_attribute_slots(ft, false);
+ }
+
+ offset = nir_iadd(b, offset, nir_imm_int(b, cur_offset));
+ }
+ }
+
+ return offset;
+}
+
+static bool
+lower_instr(nir_intrinsic_instr *instr, nir_builder *b)
+{
+ b->cursor = nir_before_instr(&instr->instr);
+
+ if (instr->intrinsic == nir_intrinsic_load_ubo) {
+ nir_ssa_def *old_idx = nir_ssa_for_src(b, instr->src[0], 1);
+ nir_ssa_def *new_idx = nir_iadd(b, old_idx, nir_imm_int(b, 1));
+ nir_instr_rewrite_src(&instr->instr, &instr->src[0],
+ nir_src_for_ssa(new_idx));
+ return true;
+ }
+
+ if (instr->intrinsic == nir_intrinsic_load_var) {
+ nir_deref_var *deref = instr->variables[0];
+
+ if (deref->var->data.mode != nir_var_uniform)
+ return false;
+
+ nir_ssa_def *ubo_idx = nir_imm_int(b, 0);
+ nir_ssa_def *ubo_offset = nir_imm_int(b, deref->var->data.driver_location * 16);
+
+ ubo_offset = get_deref_offset(&deref->deref, ubo_offset, b);
+
+ nir_intrinsic_instr *load =
+ nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_ubo);
+ load->num_components = instr->num_components;
+ load->src[0] = nir_src_for_ssa(ubo_idx);
+ load->src[1] = nir_src_for_ssa(ubo_offset);
+ nir_ssa_dest_init(&load->instr, &load->dest,
+ load->num_components, instr->dest.ssa.bit_size,
+ instr->dest.ssa.name);
+ nir_builder_instr_insert(b, &load->instr);
+ nir_ssa_def_rewrite_uses(&instr->dest.ssa, nir_src_for_ssa(&load->dest.ssa));
+
+ nir_instr_remove(&instr->instr);
+ return true;
+ }
+
+ return false;
+}
+
+bool
+nir_lower_uniforms_to_ubo(nir_shader *shader)
+{
+ bool progress = false;
+
+ nir_foreach_function(function, shader) {
+ if (function->impl) {
+ nir_builder builder;
+ nir_builder_init(&builder, function->impl);
+ nir_foreach_block(block, function->impl) {
+ nir_foreach_instr_safe(instr, block) {
+ if (instr->type == nir_instr_type_intrinsic)
+ progress |= lower_instr(nir_instr_as_intrinsic(instr),
+ &builder);
+ }
+ }
+
+ nir_metadata_preserve(function->impl, nir_metadata_block_index |
+ nir_metadata_dominance);
+ }
+ }
+
+ return progress;
+}
+
--
2.9.3
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