[Mesa-dev] [PATCH 88/92] ac/nir, radeonsi: add and use ac_shader_abi::param_{ancillary, sample_coverage}

[Nicolai Hähnle]

From: Nicolai Hähnle <nicolai.haehnle at amd.com>

---
 src/amd/common/ac_nir_to_llvm.c          | 14 ++++++++------
 src/amd/common/ac_shader_abi.h           |  2 ++
 src/gallium/drivers/radeonsi/si_shader.c |  2 ++
 3 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 04b04e4..1cb920c 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -121,22 +121,20 @@ struct nir_to_llvm_context {
 
 	LLVMValueRef esgs_ring;
 	LLVMValueRef gsvs_ring;
 	LLVMValueRef hs_ring_tess_offchip;
 	LLVMValueRef hs_ring_tess_factor;
 
 	LLVMValueRef prim_mask;
 	LLVMValueRef sample_pos_offset;
 	LLVMValueRef persp_sample, persp_center, persp_centroid;
 	LLVMValueRef linear_sample, linear_center, linear_centroid;
-	LLVMValueRef ancillary;
-	LLVMValueRef sample_coverage;
 	LLVMValueRef frag_pos[4];
 
 	LLVMTypeRef i1;
 	LLVMTypeRef i8;
 	LLVMTypeRef i16;
 	LLVMTypeRef i32;
 	LLVMTypeRef i64;
 	LLVMTypeRef v2i32;
 	LLVMTypeRef v3i32;
 	LLVMTypeRef v4i32;
@@ -830,22 +828,24 @@ static void create_function(struct nir_to_llvm_context *ctx)
 		add_vgpr_argument(&args, ctx->v2i32, &ctx->linear_sample); /* linear sample */
 		add_vgpr_argument(&args, ctx->v2i32, &ctx->linear_center); /* linear center */
 		add_vgpr_argument(&args, ctx->v2i32, &ctx->linear_centroid); /* linear centroid */
 		add_vgpr_argument(&args, ctx->f32, NULL);  /* line stipple tex */
 		add_vgpr_argument(&args, ctx->f32, &ctx->frag_pos[0]);  /* pos x float */
 		add_vgpr_argument(&args, ctx->f32, &ctx->frag_pos[1]);  /* pos y float */
 		add_vgpr_argument(&args, ctx->f32, &ctx->frag_pos[2]);  /* pos z float */
 		add_vgpr_argument(&args, ctx->f32, &ctx->frag_pos[3]);  /* pos w float */
 		ctx->abi.param_front_face =
 			add_vgpr_argument(&args, ctx->i32, NULL);  /* front face */
-		add_vgpr_argument(&args, ctx->i32, &ctx->ancillary);  /* ancillary */
-		add_vgpr_argument(&args, ctx->i32, &ctx->sample_coverage);  /* sample coverage */
+		ctx->abi.param_ancillary =
+			add_vgpr_argument(&args, ctx->i32, NULL);  /* ancillary */
+		ctx->abi.param_sample_coverage =
+			add_vgpr_argument(&args, ctx->i32, NULL);  /* sample coverage */
 		add_vgpr_argument(&args, ctx->i32, NULL);  /* fixed pt */
 		break;
 	default:
 		unreachable("Shader stage not implemented");
 	}
 
 	ctx->main_function = create_llvm_function(
 	    ctx->context, ctx->module, ctx->builder, NULL, 0, &args,
 	    ctx->max_workgroup_size,
 	    ctx->options->unsafe_math);
@@ -3925,27 +3925,29 @@ static void visit_intrinsic(struct ac_nir_context *ctx,
 		if (ctx->stage == MESA_SHADER_GEOMETRY)
 			result = ctx->nctx->gs_prim_id;
 		else if (ctx->stage == MESA_SHADER_TESS_CTRL)
 			result = ctx->nctx->tcs_patch_id;
 		else if (ctx->stage == MESA_SHADER_TESS_EVAL)
 			result = ctx->nctx->tes_patch_id;
 		else
 			fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
 		break;
 	case nir_intrinsic_load_sample_id:
-		result = unpack_param(ctx->nctx, ctx->nctx->ancillary, 8, 4);
+		result = unpack_param(ctx->nctx,
+				      LLVMGetParam(ctx->main_function, ctx->abi->param_ancillary),
+				      8, 4);
 		break;
 	case nir_intrinsic_load_sample_pos:
 		result = load_sample_pos(ctx->nctx);
 		break;
 	case nir_intrinsic_load_sample_mask_in:
-		result = ctx->nctx->sample_coverage;
+		result = LLVMGetParam(ctx->main_function, ctx->abi->param_sample_coverage);
 		break;
 	case nir_intrinsic_load_front_face:
 		result = LLVMGetParam(ctx->main_function, ctx->abi->param_front_face);
 		break;
 	case nir_intrinsic_load_instance_id:
 		result = LLVMGetParam(ctx->main_function, ctx->abi->param_instance_id);
 		break;
 	case nir_intrinsic_load_num_work_groups:
 		result = ctx->nctx->num_work_groups;
 		break;
diff --git a/src/amd/common/ac_shader_abi.h b/src/amd/common/ac_shader_abi.h
index 4fc9f0a..5caee91 100644
--- a/src/amd/common/ac_shader_abi.h
+++ b/src/amd/common/ac_shader_abi.h
@@ -36,20 +36,22 @@ enum ac_descriptor_type {
  */
 struct ac_shader_abi {
 	enum chip_class chip_class;
 
 	int param_base_vertex;
 	int param_start_instance;
 	int param_draw_id;
 	int param_vertex_id;
 	int param_instance_id;
 	int param_front_face;
+	int param_ancillary;
+	int param_sample_coverage;
 
 	/* For VS and PS: pre-loaded shader inputs.
 	 *
 	 * Currently only used for NIR shaders; indexed by variables'
 	 * driver_location.
 	 */
 	LLVMValueRef *inputs;
 
 	void (*emit_outputs)(struct ac_shader_abi *abi,
 			     unsigned max_outputs,
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 0e8a601..5e53797 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -4460,21 +4460,23 @@ static void create_function(struct si_shader_context *ctx)
 		params[SI_PARAM_LINEAR_CENTROID] = ctx->v2i32;
 		params[SI_PARAM_LINE_STIPPLE_TEX] = ctx->f32;
 		params[SI_PARAM_POS_X_FLOAT] = ctx->f32;
 		params[SI_PARAM_POS_Y_FLOAT] = ctx->f32;
 		params[SI_PARAM_POS_Z_FLOAT] = ctx->f32;
 		params[SI_PARAM_POS_W_FLOAT] = ctx->f32;
 		params[SI_PARAM_FRONT_FACE] = ctx->i32;
 		ctx->abi.param_front_face = SI_PARAM_FRONT_FACE;
 		shader->info.face_vgpr_index = 20;
 		params[SI_PARAM_ANCILLARY] = ctx->i32;
+		ctx->abi.param_ancillary = SI_PARAM_ANCILLARY;
 		params[SI_PARAM_SAMPLE_COVERAGE] = ctx->f32;
+		ctx->abi.param_sample_coverage = SI_PARAM_SAMPLE_COVERAGE;
 		params[SI_PARAM_POS_FIXED_PT] = ctx->i32;
 		num_params = SI_PARAM_POS_FIXED_PT+1;
 
 		/* Color inputs from the prolog. */
 		if (shader->selector->info.colors_read) {
 			unsigned num_color_elements =
 				util_bitcount(shader->selector->info.colors_read);
 
 			assert(num_params + num_color_elements <= ARRAY_SIZE(params));
 			for (i = 0; i < num_color_elements; i++)
-- 
2.9.3