[Mesa-dev] [PATCH 07/18] nir/spirv: Use the correct stride for non-32-bit vectors
Jason Ekstrand
jason at jlekstrand.net
Thu Jun 29 17:33:29 UTC 2017
---
src/compiler/spirv/spirv_to_nir.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c
index 18e3734..7a98843 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -744,7 +744,7 @@ vtn_handle_type(struct vtn_builder *b, SpvOp opcode,
* is always 4 bytes. This will have to change if we want to start
* supporting doubles or half-floats.
*/
- val->type->stride = 4;
+ val->type->stride = glsl_get_bit_size(base->type) / 8;
val->type->array_element = base;
break;
}
--
2.5.0.400.gff86faf
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