[Mesa-dev] [PATCH 2/2] radv: Use the new L2 writeback flag.

[Bas Nieuwenhuizen]

Signed-off-by: Bas Nieuwenhuizen <basni at google.com>
---
 src/amd/vulkan/radv_cmd_buffer.c | 8 ++++----
 src/amd/vulkan/radv_meta_clear.c | 4 ++--
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 16c3f7893b9..3ff52502ffe 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1461,7 +1461,7 @@ static void radv_src_access_flush(struct radv_cmd_buffer *cmd_buffer,
 	for_each_bit(b, src_flags) {
 		switch ((VkAccessFlagBits)(1 << b)) {
 		case VK_ACCESS_SHADER_WRITE_BIT:
-			flush_bits |= RADV_CMD_FLAG_INV_GLOBAL_L2;
+			flush_bits |= RADV_CMD_FLAG_WRITEBACK_GLOBAL_L2;
 			break;
 		case VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT:
 			flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB;
@@ -2713,7 +2713,7 @@ static void radv_initialize_htile(struct radv_cmd_buffer *cmd_buffer,
 	cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_DB_META |
 	                                RADV_CMD_FLAG_CS_PARTIAL_FLUSH |
 	                                RADV_CMD_FLAG_INV_VMEM_L1 |
-	                                RADV_CMD_FLAG_INV_GLOBAL_L2;
+	                                RADV_CMD_FLAG_WRITEBACK_GLOBAL_L2;
 }
 
 static void radv_handle_depth_image_transition(struct radv_cmd_buffer *cmd_buffer,
@@ -2762,7 +2762,7 @@ void radv_initialise_cmask(struct radv_cmd_buffer *cmd_buffer,
 	cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB_META |
 	                                RADV_CMD_FLAG_CS_PARTIAL_FLUSH |
 	                                RADV_CMD_FLAG_INV_VMEM_L1 |
-	                                RADV_CMD_FLAG_INV_GLOBAL_L2;
+	                                RADV_CMD_FLAG_WRITEBACK_GLOBAL_L2;
 }
 
 static void radv_handle_cmask_image_transition(struct radv_cmd_buffer *cmd_buffer,
@@ -2799,7 +2799,7 @@ void radv_initialize_dcc(struct radv_cmd_buffer *cmd_buffer,
 	                                RADV_CMD_FLAG_FLUSH_AND_INV_CB_META |
 	                                RADV_CMD_FLAG_CS_PARTIAL_FLUSH |
 	                                RADV_CMD_FLAG_INV_VMEM_L1 |
-	                                RADV_CMD_FLAG_INV_GLOBAL_L2;
+	                                RADV_CMD_FLAG_WRITEBACK_GLOBAL_L2;
 }
 
 static void radv_handle_dcc_image_transition(struct radv_cmd_buffer *cmd_buffer,
diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index c4f728b5b07..67700998ca5 100644
--- a/src/amd/vulkan/radv_meta_clear.c
+++ b/src/amd/vulkan/radv_meta_clear.c
@@ -907,11 +907,11 @@ emit_fast_color_clear(struct radv_cmd_buffer *cmd_buffer,
 	if (post_flush)
 		*post_flush |= RADV_CMD_FLAG_CS_PARTIAL_FLUSH |
 	                       RADV_CMD_FLAG_INV_VMEM_L1 |
-	                       RADV_CMD_FLAG_INV_GLOBAL_L2;
+	                       RADV_CMD_FLAG_WRITEBACK_GLOBAL_L2;
 	else
 		cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_CS_PARTIAL_FLUSH |
 	                                        RADV_CMD_FLAG_INV_VMEM_L1 |
-	                                        RADV_CMD_FLAG_INV_GLOBAL_L2;
+	                                        RADV_CMD_FLAG_WRITEBACK_GLOBAL_L2;
 
 	radv_set_color_clear_regs(cmd_buffer, iview->image, subpass_att, clear_color);
 
-- 
2.11.1