[Mesa-dev] [PATCH] i965/gen8+: Do full stall when switching pipeline

Jason Ekstrand jason at jlekstrand.net
Thu Mar 16 16:02:57 UTC 2017


Thanks for tracking this down!

Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

I'm not sure how we missed this when CS was brought up.  Oh well.

On Thu, Mar 16, 2017 at 1:24 AM, Topi Pohjolainen <
topi.pohjolainen at gmail.com> wrote:

> just as earlier gens do.
>
> CC:  Jason Ekstrand <jason at jlekstrand.net>
> Cc: "17.0 13.0" <mesa-stable at lists.freedesktop.org>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96743
>
> Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
> ---
>  src/mesa/drivers/dri/i965/brw_misc_state.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c
> b/src/mesa/drivers/dri/i965/brw_misc_state.c
> index 84f0c18..1cf6b04 100644
> --- a/src/mesa/drivers/dri/i965/brw_misc_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
> @@ -843,8 +843,9 @@ brw_emit_select_pipeline(struct brw_context *brw,
> enum brw_pipeline pipeline)
>
>           brw->ctx.NewDriverState |= BRW_NEW_CC_STATE;
>        }
> +   }
>
> -   } else if (brw->gen >= 6) {
> +   if (brw->gen >= 6) {
>        /* From "BXML » GT » MI » vol1a GPU Overview » [Instruction]
>         * PIPELINE_SELECT [DevBWR+]":
>         *
> --
> 2.9.3
>
>
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