[Mesa-dev] [PATCH] radeonsi: check the IR type before waiting for a compute compilation fence

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

This should fix OpenCL getting stuck.
---
 src/gallium/drivers/radeonsi/si_compute.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index ed02f49..19a9189 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -739,21 +739,23 @@ static void si_launch_grid(
 	bool cs_regalloc_hang =
 		(sctx->b.chip_class == SI ||
 		 sctx->b.family == CHIP_BONAIRE ||
 		 sctx->b.family == CHIP_KABINI) &&
 		info->block[0] * info->block[1] * info->block[2] > 256;
 
 	if (cs_regalloc_hang)
 		sctx->b.flags |= SI_CONTEXT_PS_PARTIAL_FLUSH |
 				 SI_CONTEXT_CS_PARTIAL_FLUSH;
 
-	util_queue_fence_wait(&program->ready);
+	if (program->ir_type == PIPE_SHADER_IR_TGSI)
+		util_queue_fence_wait(&program->ready);
+
 	si_decompress_compute_textures(sctx);
 
 	/* Add buffer sizes for memory checking in need_cs_space. */
 	r600_context_add_resource_size(ctx, &program->shader.bo->b.b);
 	/* TODO: add the scratch buffer */
 
 	if (info->indirect) {
 		r600_context_add_resource_size(ctx, info->indirect);
 
 		/* The hw doesn't read the indirect buffer via TC L2. */
-- 
2.7.4