[Mesa-dev] [PATCH 046/140] amdgpu/addrlib: Adjust bank equation bit order based on macro tile aspect ratio settings
Marek Olšák
maraeo at gmail.com
Mon Mar 20 22:42:56 UTC 2017
From: Frans Gu <frans.gu at amd.com>
By this way, we can have valid equation for 2D_THIN1 tile mode.
Add flag "preferEquation" to return equation index without adjusting
input tile mode.
---
src/amd/addrlib/addrinterface.h | 7 +-
src/amd/addrlib/r800/ciaddrlib.cpp | 80 ++++++-----
src/amd/addrlib/r800/siaddrlib.cpp | 271 ++++++++++++++++++++++++++++++-------
src/amd/addrlib/r800/siaddrlib.h | 15 +-
4 files changed, 282 insertions(+), 91 deletions(-)
diff --git a/src/amd/addrlib/addrinterface.h b/src/amd/addrlib/addrinterface.h
index 065545e..c68cacf 100644
--- a/src/amd/addrlib/addrinterface.h
+++ b/src/amd/addrlib/addrinterface.h
@@ -139,24 +139,26 @@ typedef union _ADDR_CHANNEL_SETTING
****************************************************************************************************
*/
typedef union _ADDR_EQUATION_KEY
{
struct
{
UINT_32 log2ElementBytes : 3; ///< Log2 of Bytes per pixel
UINT_32 tileMode : 5; ///< Tile mode
UINT_32 microTileType : 3; ///< Micro tile type
UINT_32 pipeConfig : 5; ///< pipe config
- UINT_32 numBanks : 5; ///< Number of banks
+ UINT_32 numBanksLog2 : 3; ///< Number of banks log2
UINT_32 bankWidth : 4; ///< Bank width
UINT_32 bankHeight : 4; ///< Bank height
UINT_32 macroAspectRatio : 3; ///< Macro tile aspect ratio
+ UINT_32 prt : 1; ///< SI only, indicate whether this equation is for prt
+ UINT_32 reserved : 1; ///< Reserved bit
} fields;
UINT_32 value;
} ADDR_EQUATION_KEY;
/**
****************************************************************************************************
* @brief address equation structure
****************************************************************************************************
*/
#define ADDR_MAX_EQUATION_BIT 20u
@@ -509,21 +511,22 @@ typedef union _ADDR_SURFACE_FLAGS
/// PX configuration + CZ.
UINT_32 nonSplit : 1; ///< CI: depth texture should not be split
UINT_32 disableLinearOpt : 1; ///< Disable tile mode optimization to linear
UINT_32 needEquation : 1; ///< Make the surface tile setting equation compatible.
/// This flag indicates we need to override tile
/// mode to PRT_* tile mode to disable slice rotation,
/// which is needed by swizzle pattern equation.
UINT_32 skipIndicesOutput : 1; ///< Skipping indices in output.
UINT_32 rotateDisplay : 1; ///< Rotate micro tile type
UINT_32 minimizeAlignment : 1; ///< Minimize alignment
- UINT_32 reserved : 5; ///< Reserved bits
+ UINT_32 preferEquation : 1; ///< Return equation index without adjusting tile mode
+ UINT_32 reserved : 4; ///< Reserved bits
};
UINT_32 value;
} ADDR_SURFACE_FLAGS;
/**
****************************************************************************************************
* ADDR_COMPUTE_SURFACE_INFO_INPUT
*
* @brief
diff --git a/src/amd/addrlib/r800/ciaddrlib.cpp b/src/amd/addrlib/r800/ciaddrlib.cpp
index cf08566..2c62979 100644
--- a/src/amd/addrlib/r800/ciaddrlib.cpp
+++ b/src/amd/addrlib/r800/ciaddrlib.cpp
@@ -882,62 +882,68 @@ AddrTileMode CiLib::HwlDegradeThickTileMode(
****************************************************************************************************
*/
VOID CiLib::HwlOptimizeTileMode(
ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut ///< [in,out] input output structure
) const
{
AddrTileMode tileMode = pInOut->tileMode;
// Override 2D/3D macro tile mode to PRT_* tile mode if
// client driver requests this surface is equation compatible
- if ((pInOut->flags.needEquation == TRUE) &&
- (pInOut->numSamples <= 1) &&
- (IsMacroTiled(tileMode) == TRUE) &&
- (IsPrtTileMode(tileMode) == FALSE))
+ if (IsMacroTiled(tileMode) == TRUE)
{
- UINT_32 thickness = Thickness(tileMode);
-
- if ((pInOut->maxBaseAlign != 0) && (pInOut->maxBaseAlign < Block64K))
- {
- tileMode = (thickness == 1) ? ADDR_TM_1D_TILED_THIN1 : ADDR_TM_1D_TILED_THICK;
- }
- else if (thickness == 1)
+ if ((pInOut->flags.needEquation == TRUE) &&
+ (pInOut->numSamples <= 1) &&
+ (IsPrtTileMode(tileMode) == FALSE))
{
- tileMode = ADDR_TM_PRT_TILED_THIN1;
- }
- else
- {
- static const UINT_32 PrtTileBytes = 0x10000;
- // First prt thick tile index in the tile mode table
- static const UINT_32 PrtThickTileIndex = 22;
- ADDR_TILEINFO tileInfo = {0};
-
- HwlComputeMacroModeIndex(PrtThickTileIndex,
- pInOut->flags,
- pInOut->bpp,
- pInOut->numSamples,
- &tileInfo);
-
- UINT_32 macroTileBytes = ((pInOut->bpp) >> 3) * 64 * pInOut->numSamples *
- thickness * HwlGetPipes(&tileInfo) *
- tileInfo.banks * tileInfo.bankWidth *
- tileInfo.bankHeight;
-
- if (macroTileBytes <= PrtTileBytes)
- {
- tileMode = ADDR_TM_PRT_TILED_THICK;
- }
- else
+ if ((pInOut->numSlices > 1) && ((pInOut->maxBaseAlign == 0) || (pInOut->maxBaseAlign >= Block64K)))
{
- tileMode = ADDR_TM_PRT_TILED_THIN1;
+ UINT_32 thickness = Thickness(tileMode);
+
+ if (thickness == 1)
+ {
+ tileMode = ADDR_TM_PRT_TILED_THIN1;
+ }
+ else
+ {
+ static const UINT_32 PrtTileBytes = 0x10000;
+ // First prt thick tile index in the tile mode table
+ static const UINT_32 PrtThickTileIndex = 22;
+ ADDR_TILEINFO tileInfo = {0};
+
+ HwlComputeMacroModeIndex(PrtThickTileIndex,
+ pInOut->flags,
+ pInOut->bpp,
+ pInOut->numSamples,
+ &tileInfo);
+
+ UINT_32 macroTileBytes = ((pInOut->bpp) >> 3) * 64 * pInOut->numSamples *
+ thickness * HwlGetPipes(&tileInfo) *
+ tileInfo.banks * tileInfo.bankWidth *
+ tileInfo.bankHeight;
+
+ if (macroTileBytes <= PrtTileBytes)
+ {
+ tileMode = ADDR_TM_PRT_TILED_THICK;
+ }
+ else
+ {
+ tileMode = ADDR_TM_PRT_TILED_THIN1;
+ }
+ }
}
}
+
+ if (pInOut->maxBaseAlign != 0)
+ {
+ pInOut->flags.dccCompatible = FALSE;
+ }
}
if (tileMode != pInOut->tileMode)
{
pInOut->tileMode = tileMode;
}
}
/**
****************************************************************************************************
diff --git a/src/amd/addrlib/r800/siaddrlib.cpp b/src/amd/addrlib/r800/siaddrlib.cpp
index c1f6dac..d3e9486 100644
--- a/src/amd/addrlib/r800/siaddrlib.cpp
+++ b/src/amd/addrlib/r800/siaddrlib.cpp
@@ -60,20 +60,57 @@ namespace Addr
****************************************************************************************************
*/
Lib* SiHwlInit(const Client* pClient)
{
return V1::SiLib::CreateObj(pClient);
}
namespace V1
{
+// We don't support MSAA for equation
+const BOOL_32 SiLib::m_EquationSupport[SiLib::TileTableSize][SiLib::MaxNumElementBytes] =
+{
+ {TRUE, TRUE, TRUE, FALSE, FALSE}, // 0, non-AA compressed depth or any stencil
+ {FALSE, FALSE, FALSE, FALSE, FALSE}, // 1, 2xAA/4xAA compressed depth with or without stencil
+ {FALSE, FALSE, FALSE, FALSE, FALSE}, // 2, 8xAA compressed depth with or without stencil
+ {FALSE, TRUE, FALSE, FALSE, FALSE}, // 3, 16 bpp depth PRT (non-MSAA), don't support uncompressed depth
+ {TRUE, TRUE, TRUE, FALSE, FALSE}, // 4, 1D depth
+ {FALSE, FALSE, FALSE, FALSE, FALSE}, // 5, 16 bpp depth PRT (4xMSAA)
+ {FALSE, FALSE, TRUE, FALSE, FALSE}, // 6, 32 bpp depth PRT (non-MSAA)
+ {FALSE, FALSE, FALSE, FALSE, FALSE}, // 7, 32 bpp depth PRT (4xMSAA)
+ {TRUE, TRUE, TRUE, TRUE, TRUE }, // 8, Linear
+ {TRUE, TRUE, TRUE, TRUE, TRUE }, // 9, 1D display
+ {TRUE, FALSE, FALSE, FALSE, FALSE}, // 10, 8 bpp color (displayable)
+ {FALSE, TRUE, FALSE, FALSE, FALSE}, // 11, 16 bpp color (displayable)
+ {FALSE, FALSE, TRUE, TRUE, FALSE}, // 12, 32/64 bpp color (displayable)
+ {TRUE, TRUE, TRUE, TRUE, TRUE }, // 13, 1D thin
+ {TRUE, FALSE, FALSE, FALSE, FALSE}, // 14, 8 bpp color non-displayable
+ {FALSE, TRUE, FALSE, FALSE, FALSE}, // 15, 16 bpp color non-displayable
+ {FALSE, FALSE, TRUE, FALSE, FALSE}, // 16, 32 bpp color non-displayable
+ {FALSE, FALSE, FALSE, TRUE, TRUE }, // 17, 64/128 bpp color non-displayable
+ {TRUE, TRUE, TRUE, TRUE, TRUE }, // 18, 1D THICK
+ {FALSE, FALSE, FALSE, FALSE, FALSE}, // 19, 2D XTHICK
+ {FALSE, FALSE, FALSE, FALSE, FALSE}, // 20, 2D THICK
+ {TRUE, FALSE, FALSE, FALSE, FALSE}, // 21, 8 bpp 2D PRTs (non-MSAA)
+ {FALSE, TRUE, FALSE, FALSE, FALSE}, // 22, 16 bpp 2D PRTs (non-MSAA)
+ {FALSE, FALSE, TRUE, FALSE, FALSE}, // 23, 32 bpp 2D PRTs (non-MSAA)
+ {FALSE, FALSE, FALSE, TRUE, FALSE}, // 24, 64 bpp 2D PRTs (non-MSAA)
+ {FALSE, FALSE, FALSE, FALSE, TRUE }, // 25, 128bpp 2D PRTs (non-MSAA)
+ {FALSE, FALSE, FALSE, FALSE, FALSE}, // 26, none
+ {FALSE, FALSE, FALSE, FALSE, FALSE}, // 27, none
+ {FALSE, FALSE, FALSE, FALSE, FALSE}, // 28, none
+ {FALSE, FALSE, FALSE, FALSE, FALSE}, // 29, none
+ {FALSE, FALSE, FALSE, FALSE, FALSE}, // 30, 64bpp 2D PRTs (4xMSAA)
+ {FALSE, FALSE, FALSE, FALSE, FALSE}, // 31, none
+};
+
/**
****************************************************************************************************
* SiLib::SiLib
*
* @brief
* Constructor
*
****************************************************************************************************
*/
SiLib::SiLib(const Client* pClient)
@@ -212,51 +249,146 @@ ADDR_E_RETURNCODE SiLib::ComputeBankEquation(
x5.value = (threshX > bankXStart + 2) ? x5.value : 0;
x6.value = (threshX > bankXStart + 3) ? x6.value : 0;
y3.value = (threshY > bankYStart) ? y3.value : 0;
y4.value = (threshY > bankYStart + 1) ? y4.value : 0;
y5.value = (threshY > bankYStart + 2) ? y5.value : 0;
y6.value = (threshY > bankYStart + 3) ? y6.value : 0;
switch (pTileInfo->banks)
{
case 16:
- pEquation->addr[0] = y6;
- pEquation->xor1[0] = x3;
- pEquation->addr[1] = y5;
- pEquation->xor1[1] = y6;
- pEquation->xor2[1] = x4;
- pEquation->addr[2] = y4;
- pEquation->xor1[2] = x5;
- pEquation->addr[3] = y3;
- pEquation->xor1[3] = x6;
+ if (pTileInfo->macroAspectRatio == 1)
+ {
+ pEquation->addr[0] = y6;
+ pEquation->xor1[0] = x3;
+ pEquation->addr[1] = y5;
+ pEquation->xor1[1] = y6;
+ pEquation->xor2[1] = x4;
+ pEquation->addr[2] = y4;
+ pEquation->xor1[2] = x5;
+ pEquation->addr[3] = y3;
+ pEquation->xor1[3] = x6;
+ }
+ else if (pTileInfo->macroAspectRatio == 2)
+ {
+ pEquation->addr[0] = x3;
+ pEquation->xor1[0] = y6;
+ pEquation->addr[1] = y5;
+ pEquation->xor1[1] = y6;
+ pEquation->xor2[1] = x4;
+ pEquation->addr[2] = y4;
+ pEquation->xor1[2] = x5;
+ pEquation->addr[3] = y3;
+ pEquation->xor1[3] = x6;
+ }
+ else if (pTileInfo->macroAspectRatio == 4)
+ {
+ pEquation->addr[0] = x3;
+ pEquation->xor1[0] = y6;
+ pEquation->addr[1] = x4;
+ pEquation->xor1[1] = y5;
+ pEquation->xor2[1] = y6;
+ pEquation->addr[2] = y4;
+ pEquation->xor1[2] = x5;
+ pEquation->addr[3] = y3;
+ pEquation->xor1[3] = x6;
+ }
+ else if (pTileInfo->macroAspectRatio == 8)
+ {
+ pEquation->addr[0] = x3;
+ pEquation->xor1[0] = y6;
+ pEquation->addr[1] = x4;
+ pEquation->xor1[1] = y5;
+ pEquation->xor2[1] = y6;
+ pEquation->addr[2] = x5;
+ pEquation->xor1[2] = y4;
+ pEquation->addr[3] = y3;
+ pEquation->xor1[3] = x6;
+ }
+ else
+ {
+ ADDR_ASSERT_ALWAYS();
+ }
pEquation->numBits = 4;
break;
case 8:
- pEquation->addr[0] = y5;
- pEquation->xor1[0] = x3;
- pEquation->addr[1] = y4;
- pEquation->xor1[1] = y5;
- pEquation->xor2[1] = x4;
- pEquation->addr[2] = y3;
- pEquation->xor1[2] = x5;
+ if (pTileInfo->macroAspectRatio == 1)
+ {
+ pEquation->addr[0] = y5;
+ pEquation->xor1[0] = x3;
+ pEquation->addr[1] = y4;
+ pEquation->xor1[1] = y5;
+ pEquation->xor2[1] = x4;
+ pEquation->addr[2] = y3;
+ pEquation->xor1[2] = x5;
+ }
+ else if (pTileInfo->macroAspectRatio == 2)
+ {
+ pEquation->addr[0] = x3;
+ pEquation->xor1[0] = y5;
+ pEquation->addr[1] = y4;
+ pEquation->xor1[1] = y5;
+ pEquation->xor2[1] = x4;
+ pEquation->addr[2] = y3;
+ pEquation->xor1[2] = x5;
+ }
+ else if (pTileInfo->macroAspectRatio == 4)
+ {
+ pEquation->addr[0] = x3;
+ pEquation->xor1[0] = y5;
+ pEquation->addr[1] = x4;
+ pEquation->xor1[1] = y4;
+ pEquation->xor2[1] = y5;
+ pEquation->addr[2] = y3;
+ pEquation->xor1[2] = x5;
+ }
+ else
+ {
+ ADDR_ASSERT_ALWAYS();
+ }
pEquation->numBits = 3;
break;
case 4:
- pEquation->addr[0] = y4;
- pEquation->xor1[0] = x3;
- pEquation->addr[1] = y3;
- pEquation->xor1[1] = x4;
+ if (pTileInfo->macroAspectRatio == 1)
+ {
+ pEquation->addr[0] = y4;
+ pEquation->xor1[0] = x3;
+ pEquation->addr[1] = y3;
+ pEquation->xor1[1] = x4;
+ }
+ else if (pTileInfo->macroAspectRatio == 2)
+ {
+ pEquation->addr[0] = x3;
+ pEquation->xor1[0] = y4;
+ pEquation->addr[1] = y3;
+ pEquation->xor1[1] = x4;
+ }
+ else
+ {
+ pEquation->addr[0] = x3;
+ pEquation->xor1[0] = y4;
+ pEquation->addr[1] = x4;
+ pEquation->xor1[1] = y3;
+ }
pEquation->numBits = 2;
break;
case 2:
- pEquation->addr[0] = y3;
- pEquation->xor1[0] = x3;
+ if (pTileInfo->macroAspectRatio == 1)
+ {
+ pEquation->addr[0] = y3;
+ pEquation->xor1[0] = x3;
+ }
+ else
+ {
+ pEquation->addr[0] = x3;
+ pEquation->xor1[0] = y3;
+ }
pEquation->numBits = 1;
break;
default:
pEquation->numBits = 0;
retCode = ADDR_NOTSUPPORTED;
ADDR_ASSERT_ALWAYS();
break;
}
for (UINT_32 i = 0; i < pEquation->numBits; i++)
@@ -2515,25 +2647,38 @@ ADDR_E_RETURNCODE SiLib::HwlComputeSurfaceInfo(
const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure
ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure
) const
{
pOut->tileIndex = pIn->tileIndex;
ADDR_E_RETURNCODE retCode = EgBasedLib::HwlComputeSurfaceInfo(pIn, pOut);
UINT_32 tileIndex = static_cast<UINT_32>(pOut->tileIndex);
- if ((pIn->flags.needEquation == TRUE) &&
+ if (((pIn->flags.needEquation == TRUE) ||
+ (pIn->flags.preferEquation == TRUE)) &&
(pIn->numSamples <= 1) &&
(tileIndex < TileTableSize))
{
- pOut->equationIndex = m_equationLookupTable[Log2(pIn->bpp >> 3)][tileIndex];
+ static const UINT_32 SiUncompressDepthTileIndex = 3;
+
+ if ((pIn->flags.prt == FALSE) &&
+ (m_uncompressDepthEqIndex != 0) &&
+ (tileIndex == SiUncompressDepthTileIndex))
+ {
+ pOut->equationIndex = m_uncompressDepthEqIndex + Log2(pIn->bpp >> 3);
+ }
+ else
+ {
+
+ pOut->equationIndex = m_equationLookupTable[Log2(pIn->bpp >> 3)][tileIndex];
+ }
if (pOut->equationIndex != ADDR_INVALID_EQUATION_INDEX)
{
pOut->blockWidth = m_blockWidth[pOut->equationIndex];
pOut->blockHeight = m_blockHeight[pOut->equationIndex];
pOut->blockSlices = m_blockSlices[pOut->equationIndex];
}
}
@@ -3150,22 +3295,20 @@ VOID SiLib::HwlOptimizeTileMode(
) const
{
AddrTileMode tileMode = pInOut->tileMode;
if ((pInOut->flags.needEquation == TRUE) &&
(IsMacroTiled(tileMode) == TRUE) &&
(pInOut->numSamples <= 1))
{
UINT_32 thickness = Thickness(tileMode);
- pInOut->flags.prt = TRUE;
-
if (thickness > 1)
{
tileMode = ADDR_TM_1D_TILED_THICK;
}
else if (pInOut->numSlices > 1)
{
tileMode = ADDR_TM_1D_TILED_THIN1;
}
else
{
@@ -3442,36 +3585,38 @@ VOID SiLib::InitEquationTable()
TileConfig tileConfig = m_tileTable[tileIndex];
ADDR_SURFACE_FLAGS flags = {{0}};
// Compute tile info, hardcode numSamples to 1 because MSAA is not supported
// in swizzle pattern equation
HwlComputeMacroModeIndex(tileIndex, flags, bpp, 1, &tileConfig.info, NULL, NULL);
// Check if the input is supported
- if (IsEquationSupported(bpp, tileConfig, tileIndex) == TRUE)
+ if (IsEquationSupported(bpp, tileConfig, tileIndex, log2ElementBytes) == TRUE)
{
ADDR_EQUATION_KEY key = {{0}};
// Generate swizzle equation key from bpp and tile config
key.fields.log2ElementBytes = log2ElementBytes;
key.fields.tileMode = tileConfig.mode;
// Treat depth micro tile type and non-display micro tile type as the same key
// because they have the same equation actually
key.fields.microTileType = (tileConfig.type == ADDR_DEPTH_SAMPLE_ORDER) ?
ADDR_NON_DISPLAYABLE : tileConfig.type;
key.fields.pipeConfig = tileConfig.info.pipeConfig;
- key.fields.numBanks = tileConfig.info.banks;
+ key.fields.numBanksLog2 = Log2(tileConfig.info.banks);
key.fields.bankWidth = tileConfig.info.bankWidth;
key.fields.bankHeight = tileConfig.info.bankHeight;
key.fields.macroAspectRatio = tileConfig.info.macroAspectRatio;
+ key.fields.prt = ((m_chipFamily == ADDR_CHIP_FAMILY_SI) &&
+ ((1 << tileIndex) & SiPrtTileIndexMask)) ? 1 : 0;
// Find in the table if the equation has been built based on the key
for (UINT_32 i = 0; i < m_numEquations; i++)
{
if (key.value == equationKeyTable[i].value)
{
equationIndex = i;
break;
}
}
@@ -3521,21 +3666,21 @@ VOID SiLib::InitEquationTable()
{
const ADDR_TILEINFO* pTileInfo = &tileConfig.info;
m_blockWidth[equationIndex] =
HwlGetPipes(pTileInfo) * MicroTileWidth * pTileInfo->bankWidth *
pTileInfo->macroAspectRatio;
m_blockHeight[equationIndex] =
MicroTileHeight * pTileInfo->bankHeight * pTileInfo->banks /
pTileInfo->macroAspectRatio;
- if (m_chipFamily == ADDR_CHIP_FAMILY_SI)
+ if (key.fields.prt)
{
UINT_32 macroTileSize =
m_blockWidth[equationIndex] * m_blockHeight[equationIndex] *
bpp / 8;
if (macroTileSize < PrtTileSize)
{
UINT_32 numMacroTiles = PrtTileSize / macroTileSize;
ADDR_ASSERT(macroTileSize == (1u << equation.numBits));
@@ -3564,38 +3709,81 @@ VOID SiLib::InitEquationTable()
m_numEquations++;
}
}
}
// Fill the index into the lookup table, if the combination is not supported
// fill the invalid equation index
m_equationLookupTable[log2ElementBytes][tileIndex] = equationIndex;
}
+
+ if (m_chipFamily == ADDR_CHIP_FAMILY_SI)
+ {
+ // For tile index 3 which is shared between PRT depth and uncompressed depth
+ m_uncompressDepthEqIndex = m_numEquations;
+
+ for (UINT_32 log2ElemBytes = 0; log2ElemBytes < MaxNumElementBytes; log2ElemBytes++)
+ {
+ TileConfig tileConfig = m_tileTable[3];
+ ADDR_EQUATION equation;
+ ADDR_E_RETURNCODE retCode;
+
+ memset(&equation, 0, sizeof(ADDR_EQUATION));
+
+ retCode = ComputeMacroTileEquation(log2ElemBytes,
+ tileConfig.mode,
+ tileConfig.type,
+ &tileConfig.info,
+ &equation);
+
+ if (retCode == ADDR_OK)
+ {
+ UINT_32 equationIndex = m_numEquations;
+ ADDR_ASSERT(equationIndex < EquationTableSize);
+
+ m_blockSlices[equationIndex] = 1;
+
+ const ADDR_TILEINFO* pTileInfo = &tileConfig.info;
+
+ m_blockWidth[equationIndex] =
+ HwlGetPipes(pTileInfo) * MicroTileWidth * pTileInfo->bankWidth *
+ pTileInfo->macroAspectRatio;
+ m_blockHeight[equationIndex] =
+ MicroTileHeight * pTileInfo->bankHeight * pTileInfo->banks /
+ pTileInfo->macroAspectRatio;
+
+ m_equationTable[equationIndex] = equation;
+
+ m_numEquations++;
+ }
+ }
+ }
}
}
/**
****************************************************************************************************
* SiLib::IsEquationSupported
*
* @brief
* Check if it is supported for given bpp and tile config to generate a equation.
*
* @return
* TRUE if supported
****************************************************************************************************
*/
BOOL_32 SiLib::IsEquationSupported(
- UINT_32 bpp, ///< Bits per pixel
- TileConfig tileConfig, ///< Tile config
- INT_32 tileIndex ///< Tile index
+ UINT_32 bpp, ///< Bits per pixel
+ TileConfig tileConfig, ///< Tile config
+ INT_32 tileIndex, ///< Tile index
+ UINT_32 elementBytesLog2 ///< Log2 of element bytes
) const
{
BOOL_32 supported = TRUE;
// Linear tile mode is not supported in swizzle pattern equation
if (IsLinear(tileConfig.mode))
{
supported = FALSE;
}
// These tile modes are for Tex2DArray and Tex3D which has depth (num_slice > 1) use,
@@ -3617,36 +3805,19 @@ BOOL_32 SiLib::IsEquationSupported(
else if (IsMacroTiled(tileConfig.mode))
{
UINT_32 thickness = Thickness(tileConfig.mode);
if (((bpp >> 3) * MicroTilePixels * thickness) > tileConfig.info.tileSplitBytes)
{
supported = FALSE;
}
if ((supported == TRUE) && (m_chipFamily == ADDR_CHIP_FAMILY_SI))
{
- // Please refer to SiLib::HwlSetupTileInfo for PRT tile index selecting
- // Tile index 3, 6, 21-25 are for PRT single sample
- if (tileIndex == 3)
- {
- supported = (bpp == 16);
- }
- else if (tileIndex == 6)
- {
- supported = (bpp == 32);
- }
- else if ((tileIndex >= 21) && (tileIndex <= 25))
- {
- supported = (bpp == 8u * (1u << (static_cast<UINT_32>(tileIndex) - 21u)));
- }
- else
- {
- supported = FALSE;
- }
+ supported = m_EquationSupport[tileIndex][elementBytesLog2];
}
}
return supported;
}
} // V1
} // Addr
diff --git a/src/amd/addrlib/r800/siaddrlib.h b/src/amd/addrlib/r800/siaddrlib.h
index 6daaa23..37e26ff 100644
--- a/src/amd/addrlib/r800/siaddrlib.h
+++ b/src/amd/addrlib/r800/siaddrlib.h
@@ -254,21 +254,21 @@ protected:
// Get equation table pointer and number of equations
virtual UINT_32 HwlGetEquationTableInfo(const ADDR_EQUATION** ppEquationTable) const
{
*ppEquationTable = m_equationTable;
return m_numEquations;
}
// Check if it is supported for given bpp and tile config to generate an equation
BOOL_32 IsEquationSupported(
- UINT_32 bpp, TileConfig tileConfig, INT_32 tileIndex) const;
+ UINT_32 bpp, TileConfig tileConfig, INT_32 tileIndex, UINT_32 elementBytesLog2) const;
// Protected non-virtual functions
VOID ComputeTileCoordFromPipeAndElemIdx(
UINT_32 elemIdx, UINT_32 pipe, AddrPipeCfg pipeCfg, UINT_32 pitchInMacroTile,
UINT_32 x, UINT_32 y, UINT_32* pX, UINT_32* pY) const;
UINT_32 TileCoordToMaskElementIndex(
UINT_32 tx, UINT_32 ty, AddrPipeCfg pipeConfig,
UINT_32 *macroShift, UINT_32 *elemIdxBits) const;
@@ -282,32 +282,43 @@ protected:
VOID InitEquationTable();
UINT_32 GetPipePerSurf(AddrPipeCfg pipeConfig) const;
static const UINT_32 TileTableSize = 32;
TileConfig m_tileTable[TileTableSize];
UINT_32 m_noOfEntries;
// Max number of bpp (8bpp/16bpp/32bpp/64bpp/128bpp)
static const UINT_32 MaxNumElementBytes = 5;
+
+ static const BOOL_32 m_EquationSupport[TileTableSize][MaxNumElementBytes];
+
+ // Prt tile mode index mask
+ static const UINT_32 SiPrtTileIndexMask = ((1 << 3) | (1 << 5) | (1 << 6) | (1 << 7) |
+ (1 << 21) | (1 << 22) | (1 << 23) | (1 << 24) |
+ (1 << 25) | (1 << 30));
+
// More than half slots in tile mode table can't support equation
- static const UINT_32 EquationTableSize = (MaxNumElementBytes * TileTableSize) / 2;
+ static const UINT_32 EquationTableSize = (MaxNumElementBytes * TileTableSize) / 2;
// Equation table
ADDR_EQUATION m_equationTable[EquationTableSize];
+ UINT_32 m_numMacroBits[EquationTableSize];
UINT_32 m_blockWidth[EquationTableSize];
UINT_32 m_blockHeight[EquationTableSize];
UINT_32 m_blockSlices[EquationTableSize];
// Number of equation entries in the table
UINT_32 m_numEquations;
// Equation lookup table according to bpp and tile index
UINT_32 m_equationLookupTable[MaxNumElementBytes][TileTableSize];
+ UINT_32 m_uncompressDepthEqIndex;
+
private:
VOID ReadGbTileMode(UINT_32 regValue, TileConfig* pCfg) const;
BOOL_32 InitTileSettingTable(const UINT_32 *pSetting, UINT_32 noOfEntries);
SIChipSettings m_settings;
};
} // V1
} // Addr
--
2.7.4
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