[Mesa-dev] [PATCH 2/8] genxml: Generate header genX_bits.h
Chad Versace
chadversary at chromium.org
Tue Mar 21 23:02:34 UTC 2017
genX_bits.h contains the sizes of bitfields in genxml instructions,
structures, and registers. It also defines some functions to query those
sizes.
Currently, the bitfields in genX_bits.h are those whose name matches
/.*Surface(Q?)Pitch/.
isl_surf_init() will use the new header to validate that requested
pitches fit in their destination bitfields.
What's currently in genX_bits.h:
- Each macro in gen*_pack.h that whose name matches
/.*Surface(Q?)Pitch_bits$/ is also in genX_bits.h.
- For each set of macros whose name, after stripping the GEN prefix,
is the same, genX_bits.h contains a query function. See the examples
below.
The generated file is not committed, so here are some excerpts:
Example: The GEN7 and GEN6 sections:
#define GEN7_RENDER_SURFACE_STATE_SurfacePitch_bits 18
#define GEN7_RENDER_SURFACE_STATE_MCSSurfacePitch_bits 9
#define GEN7_3DSTATE_DEPTH_BUFFER_SurfacePitch_bits 18
#define GEN7_3DSTATE_HIER_DEPTH_BUFFER_SurfacePitch_bits 17
#define GEN7_3DSTATE_STENCIL_BUFFER_SurfacePitch_bits 17
#define GEN6_RENDER_SURFACE_STATE_SurfacePitch_bits 17
#define GEN6_3DSTATE_DEPTH_BUFFER_SurfacePitch_bits 17
#define GEN6_3DSTATE_HIER_DEPTH_BUFFER_SurfacePitch_bits 17
#define GEN6_3DSTATE_STENCIL_BUFFER_SurfacePitch_bits 17
Example: The SurfacePitch and AuxiliarySurfacePitch functions for
RENDER_SURFACE_STATE:
static inline uint32_t __attribute__((const))
RENDER_SURFACE_STATE_SurfacePitch_bits(int gen_10x)
{
switch (gen_10x) {
case 90: return GEN9_RENDER_SURFACE_STATE_SurfacePitch_bits;
case 80: return GEN8_RENDER_SURFACE_STATE_SurfacePitch_bits;
case 75: return GEN75_RENDER_SURFACE_STATE_SurfacePitch_bits;
case 70: return GEN7_RENDER_SURFACE_STATE_SurfacePitch_bits;
case 60: return GEN6_RENDER_SURFACE_STATE_SurfacePitch_bits;
case 50: return GEN5_RENDER_SURFACE_STATE_SurfacePitch_bits;
case 45: return GEN45_RENDER_SURFACE_STATE_SurfacePitch_bits;
case 40: return GEN4_RENDER_SURFACE_STATE_SurfacePitch_bits;
default: return 0;
}
}
static inline uint32_t __attribute__((const))
RENDER_SURFACE_STATE_AuxiliarySurfacePitch_bits(int gen_10x)
{
switch (gen_10x) {
case 90: return GEN9_RENDER_SURFACE_STATE_AuxiliarySurfacePitch_bits;
case 80: return GEN8_RENDER_SURFACE_STATE_AuxiliarySurfacePitch_bits;
case 75: return GEN75_RENDER_SURFACE_STATE_MCSSurfacePitch_bits;
case 70: return GEN7_RENDER_SURFACE_STATE_MCSSurfacePitch_bits;
default: return 0;
}
}
---
src/intel/Makefile.genxml.am | 9 +-
src/intel/Makefile.sources | 6 +-
src/intel/genxml/.gitignore | 1 +
src/intel/genxml/gen_bits_header.py | 164 ++++++++++++++++++++++++++++++++++++
4 files changed, 178 insertions(+), 2 deletions(-)
create mode 100644 src/intel/genxml/gen_bits_header.py
diff --git a/src/intel/Makefile.genxml.am b/src/intel/Makefile.genxml.am
index bea0aab817f..586e551e79b 100644
--- a/src/intel/Makefile.genxml.am
+++ b/src/intel/Makefile.genxml.am
@@ -29,7 +29,7 @@ EXTRA_DIST += \
SUFFIXES = _pack.h _xml.h .xml
-$(GENXML_GENERATED_FILES): genxml/gen_pack_header.py
+$(GENXML_PACK_GENERATED_FILES): genxml/gen_pack_header.py
.xml_pack.h:
$(MKDIR_GEN)
@@ -41,6 +41,12 @@ $(GENXML_GENERATED_FILES): genxml/gen_zipped_file.py
$(MKDIR_GEN)
$(AM_V_GEN) $(PYTHON2) $(srcdir)/genxml/gen_zipped_file.py $< > $@ || ($(RM) $@; false)
+genxml/genX_bits.h: genxml/gen_bits_header.py
+genxml/genX_bits.h: $(GENXML_PACK_GENERATED_FILES)
+ $(MKDIR_GEN)
+ $(AM_V_GEN) $(PYTHON2) $(srcdir)/genxml/gen_bits_header.py \
+ $(GENXML_PACK_GENERATED_FILES) > $@ || ($(RM) $@; false)
+
EXTRA_DIST += \
genxml/gen4.xml \
genxml/gen45.xml \
@@ -50,6 +56,7 @@ EXTRA_DIST += \
genxml/gen75.xml \
genxml/gen8.xml \
genxml/gen9.xml \
+ genxml/genX_bits.h \
genxml/genX_pack.h \
genxml/gen_macros.h \
genxml/gen_pack_header.py \
diff --git a/src/intel/Makefile.sources b/src/intel/Makefile.sources
index 839ea47d752..af85d448eb8 100644
--- a/src/intel/Makefile.sources
+++ b/src/intel/Makefile.sources
@@ -107,7 +107,7 @@ COMPILER_FILES = \
COMPILER_GENERATED_FILES = \
compiler/brw_nir_trig_workarounds.c
-GENXML_GENERATED_FILES = \
+GENXML_PACK_GENERATED_FILES = \
genxml/gen4_pack.h \
genxml/gen45_pack.h \
genxml/gen5_pack.h \
@@ -117,6 +117,10 @@ GENXML_GENERATED_FILES = \
genxml/gen8_pack.h \
genxml/gen9_pack.h
+GENXML_GENERATED_FILES = \
+ $(GENXML_PACK_GENERATED_FILES) \
+ genxml/genX_bits.h
+
AUBINATOR_GENERATED_FILES = \
genxml/gen6_xml.h \
genxml/gen7_xml.h \
diff --git a/src/intel/genxml/.gitignore b/src/intel/genxml/.gitignore
index c5672b5595c..3e2f1cfa9f0 100644
--- a/src/intel/genxml/.gitignore
+++ b/src/intel/genxml/.gitignore
@@ -1,2 +1,3 @@
+gen*_bits.h
gen*_pack.h
gen*_xml.h
diff --git a/src/intel/genxml/gen_bits_header.py b/src/intel/genxml/gen_bits_header.py
new file mode 100644
index 00000000000..a6630cb89ed
--- /dev/null
+++ b/src/intel/genxml/gen_bits_header.py
@@ -0,0 +1,164 @@
+#encoding=utf-8
+
+from __future__ import (
+ absolute_import, division, print_function, unicode_literals
+)
+
+import io
+import os
+import os.path
+import re
+import sys
+from sys import stdout
+from textwrap import dedent
+
+prologue = dedent("""\
+ /*
+ * Copyright (C) 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+ /* THIS FILE HAS BEEN GENERATED, DO NOT HAND EDIT.
+ *
+ * Sizes of bitfields in genxml instructions, structures, and registers.
+ */
+
+ #ifndef GENX_BITS_H
+ #define GENX_BITS_H
+
+ #include <stdint.h>
+
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+
+ """)
+
+epilogue = dedent("""\
+ #ifdef __cplusplus
+ }
+ #endif
+
+ #endif /* GENX_BITS_H */
+ """)
+
+def sanitize_token(t):
+ if t[0].isdigit():
+ return '_' + t
+ else:
+ return t
+
+def genx_prefix(x):
+ return 'GENX_' + x
+
+class BitsLine:
+
+ __slots__ = (
+ 'orig_line',
+ 'gen_10x',
+ 'token_name',
+ 'token_basename',
+ )
+
+ REGEX = re.compile('^#define (?P<token_name>GEN(?P<gen>[0-9]+)_(?P<token_basename>\w*Surface(Q?)Pitch)_bits).*$')
+
+ def __init__(self, match):
+ self.orig_line = match.group(0)
+
+ self.gen_10x = int(match.group('gen'))
+ if self.gen_10x < 10:
+ self.gen_10x *= 10
+
+ self.token_name = match.group('token_name')
+ self.token_basename = match.group('token_basename')
+
+ # MCSSurfacePitch in older gens is analogous to AuxiliarySurfacePitch
+ # in newer gens.
+ self.token_basename = \
+ self.token_basename.replace('MCSSurfacePitch', 'AuxiliarySurfacePitch')
+
+class BitsCollection:
+
+ def __init__(self):
+ self.by_gen_10x = {}
+ self.by_token_basenames = {}
+
+ def add(self, bits_line):
+ # We don't care about 3DSTATE_STREAMOUT.
+ if ('STREAMOUT' in bits_line.token_name or
+ 'SO_BUFFER' in bits_line.token_name):
+ return
+
+ self.by_gen_10x.setdefault(bits_line.gen_10x, []).append(bits_line)
+ self.by_token_basenames.setdefault(bits_line.token_basename, []).append(bits_line)
+
+ def read_filepath(self, path):
+ with open(path) as file:
+ for line in file:
+ m = BitsLine.REGEX.match(line)
+ if not m:
+ continue
+ self.add(BitsLine(m))
+
+ def write_macros(self, out):
+ for gen_10x in sorted(self.by_gen_10x.keys(), reverse=True):
+ for bits_line in self.by_gen_10x[gen_10x]:
+ out.write(bits_line.orig_line)
+ out.write('\n')
+ out.write('\n')
+
+ def write_funcs(self, out):
+ for token_basename in sorted(self.by_token_basenames.keys()):
+ out.write('static inline uint32_t __attribute__((const))\n')
+ out.write('{}_bits(int gen_10x)\n'.format(sanitize_token(token_basename)))
+ out.write('{\n')
+ out.write(' switch (gen_10x) {\n')
+
+ def sort_key(bits_line):
+ return bits_line.gen_10x
+
+ for bits_line in sorted(self.by_token_basenames[token_basename],
+ key=sort_key, reverse=True):
+ out.write(' case {}: return {};\n'.format(bits_line.gen_10x, bits_line.token_name))
+
+ out.write(' default: return 0;\n')
+ out.write(' }\n')
+ out.write('}\n')
+ out.write('\n')
+
+def main():
+ sources = sorted(sys.argv[1:])
+ if len(sources) == 0:
+ sys.stderr.write('error: no source files\n')
+ sys.exit(1)
+
+ bits_collection = BitsCollection()
+
+ for path in sources:
+ bits_collection.read_filepath(path)
+
+ sys.stdout.write(prologue)
+ bits_collection.write_macros(stdout)
+ bits_collection.write_funcs(stdout)
+ sys.stdout.write(epilogue)
+
+if __name__ == '__main__':
+ main()
--
2.12.0
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