[Mesa-dev] [PATCH v2 11/25] winsys/radeon: sparse buffers will not be supported
Nicolai Hähnle
nhaehnle at gmail.com
Tue Mar 28 09:12:01 UTC 2017
From: Nicolai Hähnle <nicolai.haehnle at amd.com>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
---
src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
index f6d5c8a..1419169 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
@@ -929,20 +929,22 @@ static struct pb_buffer *
radeon_winsys_bo_create(struct radeon_winsys *rws,
uint64_t size,
unsigned alignment,
enum radeon_bo_domain domain,
enum radeon_bo_flag flags)
{
struct radeon_drm_winsys *ws = radeon_drm_winsys(rws);
struct radeon_bo *bo;
unsigned usage = 0, pb_cache_bucket;
+ assert(!(flags & RADEON_FLAG_SPARSE)); /* not supported */
+
/* Only 32-bit sizes are supported. */
if (size > UINT_MAX)
return NULL;
/* Sub-allocate small buffers from slabs. */
if (!(flags & RADEON_FLAG_HANDLE) &&
size <= (1 << RADEON_SLAB_MAX_SIZE_LOG2) &&
ws->info.has_virtual_memory &&
alignment <= MAX2(1 << RADEON_SLAB_MIN_SIZE_LOG2, util_next_power_of_two(size))) {
struct pb_slab_entry *entry;
--
2.9.3
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