[Mesa-dev] [PATCH] i965: Combine intel_batchbuffer_reloc and intel_batchbuffer_reloc64
Jason Ekstrand
jason at jlekstrand.net
Wed Mar 29 05:41:30 UTC 2017
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
On March 28, 2017 21:50:54 Kenneth Graunke <kenneth at whitecape.org> wrote:
> These two functions do the exact same thing. One returns a uint64_t,
> and the other takes the same uint64_t and truncates it to a uint32_t.
>
> We only need the uint64_t variant - the caller can truncate if it wants.
> This patch gives us one function, intel_batchbuffer_reloc, that does
> the 64-bit thing.
> ---
> src/mesa/drivers/dri/i965/genX_blorp_exec.c | 15 +++---------
> src/mesa/drivers/dri/i965/intel_batchbuffer.c | 22 +----------------
> src/mesa/drivers/dri/i965/intel_batchbuffer.h | 35 +++++++++++----------------
> 3 files changed, 19 insertions(+), 53 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/genX_blorp_exec.c
> b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
> index 35310fa03df..b8dcf9fd3b5 100644
> --- a/src/mesa/drivers/dri/i965/genX_blorp_exec.c
> +++ b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
> @@ -48,31 +48,24 @@ blorp_emit_dwords(struct blorp_batch *batch, unsigned n)
> }
>
> static uint64_t
> blorp_emit_reloc(struct blorp_batch *batch,
> void *location, struct blorp_address address, uint32_t delta)
> {
> assert(batch->blorp->driver_ctx == batch->driver_batch);
> struct brw_context *brw = batch->driver_batch;
>
> uint32_t offset = (char *)location - (char *)brw->batch.map;
> - if (brw->gen >= 8) {
> - return intel_batchbuffer_reloc64(&brw->batch, address.buffer, offset,
> - address.read_domains,
> - address.write_domain,
> - address.offset + delta);
> - } else {
> - return intel_batchbuffer_reloc(&brw->batch, address.buffer, offset,
> - address.read_domains,
> - address.write_domain,
> - address.offset + delta);
> - }
> + return intel_batchbuffer_reloc(&brw->batch, address.buffer, offset,
> + address.read_domains,
> + address.write_domain,
> + address.offset + delta);
> }
>
> static void
> blorp_surface_reloc(struct blorp_batch *batch, uint32_t ss_offset,
> struct blorp_address address, uint32_t delta)
> {
> assert(batch->blorp->driver_ctx == batch->driver_batch);
> struct brw_context *brw = batch->driver_batch;
> drm_intel_bo *bo = address.buffer;
>
> diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
> b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
> index 49a00c12ba2..1599a2c2a53 100644
> --- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
> +++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
> @@ -569,61 +569,41 @@ _intel_batchbuffer_flush_fence(struct brw_context *brw,
>
> /* Start a new batch buffer. */
> brw_new_batch(brw);
>
> return ret;
> }
>
>
> /* This is the only way buffers get added to the validate list.
> */
> -uint32_t
> +uint64_t
> intel_batchbuffer_reloc(struct intel_batchbuffer *batch,
> drm_intel_bo *buffer, uint32_t offset,
> uint32_t read_domains, uint32_t write_domain,
> uint32_t delta)
> {
> int ret;
>
> ret = drm_intel_bo_emit_reloc(batch->bo, offset,
> buffer, delta,
> read_domains, write_domain);
> assert(ret == 0);
> (void)ret;
>
> /* Using the old buffer offset, write in what the right data would be, in
> * case the buffer doesn't move and we can short-circuit the relocation
> * processing in the kernel
> */
> return buffer->offset64 + delta;
> }
>
> -uint64_t
> -intel_batchbuffer_reloc64(struct intel_batchbuffer *batch,
> - drm_intel_bo *buffer, uint32_t offset,
> - uint32_t read_domains, uint32_t write_domain,
> - uint32_t delta)
> -{
> - int ret = drm_intel_bo_emit_reloc(batch->bo, offset,
> - buffer, delta,
> - read_domains, write_domain);
> - assert(ret == 0);
> - (void) ret;
> -
> - /* Using the old buffer offset, write in what the right data would be, in
> - * case the buffer doesn't move and we can short-circuit the relocation
> - * processing in the kernel
> - */
> - return buffer->offset64 + delta;
> -}
> -
> -
> void
> intel_batchbuffer_data(struct brw_context *brw,
> const void *data, GLuint bytes, enum brw_gpu_ring ring)
> {
> assert((bytes & 3) == 0);
> intel_batchbuffer_require_space(brw, bytes, ring);
> memcpy(brw->batch.map_next, data, bytes);
> brw->batch.map_next += bytes >> 2;
> }
>
> diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.h
> b/src/mesa/drivers/dri/i965/intel_batchbuffer.h
> index 01d48048a68..cf545ec1886 100644
> --- a/src/mesa/drivers/dri/i965/intel_batchbuffer.h
> +++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.h
> @@ -57,32 +57,26 @@ int _intel_batchbuffer_flush_fence(struct brw_context *brw,
> __FILE__, __LINE__)
>
> /* Unlike bmBufferData, this currently requires the buffer be mapped.
> * Consider it a convenience function wrapping multple
> * intel_buffer_dword() calls.
> */
> void intel_batchbuffer_data(struct brw_context *brw,
> const void *data, GLuint bytes,
> enum brw_gpu_ring ring);
>
> -uint32_t intel_batchbuffer_reloc(struct intel_batchbuffer *batch,
> +uint64_t intel_batchbuffer_reloc(struct intel_batchbuffer *batch,
> drm_intel_bo *buffer,
> uint32_t offset,
> uint32_t read_domains,
> uint32_t write_domain,
> uint32_t delta);
> -uint64_t intel_batchbuffer_reloc64(struct intel_batchbuffer *batch,
> - drm_intel_bo *buffer,
> - uint32_t offset,
> - uint32_t read_domains,
> - uint32_t write_domain,
> - uint32_t delta);
>
> #define USED_BATCH(batch) ((uintptr_t)((batch).map_next - (batch).map))
>
> static inline uint32_t float_as_int(float f)
> {
> union {
> float f;
> uint32_t d;
> } fi;
>
> @@ -154,37 +148,36 @@ intel_batchbuffer_advance(struct brw_context *brw)
> brw->batch.map_next += (n)
>
> #define BEGIN_BATCH_BLT(n) do { \
> intel_batchbuffer_begin(brw, (n), BLT_RING); \
> uint32_t *__map = brw->batch.map_next; \
> brw->batch.map_next += (n)
>
> #define OUT_BATCH(d) *__map++ = (d)
> #define OUT_BATCH_F(f) OUT_BATCH(float_as_int((f)))
>
> -#define OUT_RELOC(buf, read_domains, write_domain, delta) do { \
> - uint32_t __offset = (__map - brw->batch.map) * 4; \
> - OUT_BATCH(intel_batchbuffer_reloc(&brw->batch, (buf), __offset, \
> - (read_domains), \
> - (write_domain), \
> - (delta))); \
> +#define OUT_RELOC(buf, read_domains, write_domain, delta) do { \
> + uint32_t __offset = (__map - brw->batch.map) * 4; \
> + uint32_t reloc = \
> + intel_batchbuffer_reloc(&brw->batch, (buf), __offset, \
> + (read_domains), (write_domain), (delta)); \
> + OUT_BATCH(reloc); \
> } while (0)
>
> /* Handle 48-bit address relocations for Gen8+ */
> -#define OUT_RELOC64(buf, read_domains, write_domain, delta) do { \
> - uint32_t __offset = (__map - brw->batch.map) * 4; \
> - uint64_t reloc64 = intel_batchbuffer_reloc64(&brw->batch, (buf),
> __offset, \
> - (read_domains), \
> - (write_domain), \
> - (delta)); \
> - OUT_BATCH(reloc64); \
> - OUT_BATCH(reloc64 >> 32); \
> +#define OUT_RELOC64(buf, read_domains, write_domain, delta) do { \
> + uint32_t __offset = (__map - brw->batch.map) * 4; \
> + uint64_t reloc64 = \
> + intel_batchbuffer_reloc(&brw->batch, (buf), __offset, \
> + (read_domains), (write_domain), (delta)); \
> + OUT_BATCH(reloc64); \
> + OUT_BATCH(reloc64 >> 32); \
> } while (0)
>
> #define ADVANCE_BATCH() \
> assert(__map == brw->batch.map_next); \
> intel_batchbuffer_advance(brw); \
> } while (0)
>
> #ifdef __cplusplus
> }
> #endif
> --
> 2.12.1
>
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