[Mesa-dev] [PATCH 04/10] radeonsi/gfx9: fix linear mipmap CPU access

[Nicolai Hähnle]

On 31.03.2017 10:18, Marek Olšák wrote:
> On Fri, Mar 31, 2017 at 8:17 AM, Nicolai Hähnle <nhaehnle at gmail.com> wrote:
>> On 30.03.2017 19:16, Marek Olšák wrote:
>>>
>>> From: Marek Olšák <marek.olsak at amd.com>
>>>
>>> ---
>>>  src/gallium/drivers/radeon/r600_texture.c      | 8 +++-----
>>>  src/gallium/drivers/radeon/radeon_winsys.h     | 4 ++--
>>>  src/gallium/winsys/amdgpu/drm/amdgpu_surface.c | 2 +-
>>>  3 files changed, 6 insertions(+), 8 deletions(-)
>>>
>>> diff --git a/src/gallium/drivers/radeon/r600_texture.c
>>> b/src/gallium/drivers/radeon/r600_texture.c
>>> index 877f555..77e9bec 100644
>>> --- a/src/gallium/drivers/radeon/r600_texture.c
>>> +++ b/src/gallium/drivers/radeon/r600_texture.c
>>> @@ -186,22 +186,22 @@ static unsigned r600_texture_get_offset(struct
>>> r600_common_screen *rscreen,
>>>         if (rscreen->chip_class >= GFX9) {
>>>                 *stride = rtex->surface.u.gfx9.surf_pitch *
>>> rtex->surface.bpe;
>>>                 *layer_stride = rtex->surface.u.gfx9.surf_slice_size;
>>>
>>>                 if (!box)
>>>                         return 0;
>>>
>>>                 /* Each texture is an array of slices. Each slice is an
>>> array
>>>                  * of mipmap levels. */
>>>                 return box->z * rtex->surface.u.gfx9.surf_slice_size +
>>> -                      ((rtex->surface.u.gfx9.surf_ymip_offset[level] +
>>> -                        box->y / rtex->surface.blk_h) *
>>> +                      rtex->surface.u.gfx9.offset[level] +
>>> +                      (box->y / rtex->surface.blk_h *
>>>                         rtex->surface.u.gfx9.surf_pitch +
>>>                         box->x / rtex->surface.blk_w) * rtex->surface.bpe;
>>
>>
>> Does this part of the formula really not depend on the mip level? It looks
>> like each mip level uses the same amount of memory and pitch?
>
> Only the same pitch. All mip levels are placed in one 2D plane. The
> linear layout puts them below each other. That's why the pitch is the
> same. blk_w/blk_h are for compressed textures.

Thanks for the explanation.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

> Marek
>


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