[Mesa-dev] [PATCH 02/11] i965: Pass pointer and end of assembly to brw_validate_instructions

Iago Toral itoral at igalia.com
Tue May 2 12:30:23 UTC 2017


On Mon, 2017-05-01 at 13:54 -0700, Matt Turner wrote:
> This will allow us to more easily run brw_validate_instructions() on
> shader programs we find in GPU hang error states.
> ---
>  src/intel/compiler/brw_eu.h               |  3 ++-
>  src/intel/compiler/brw_eu_validate.c      | 10 ++++------
>  src/intel/compiler/brw_fs_generator.cpp   | 10 ++++++++--
>  src/intel/compiler/brw_vec4_generator.cpp |  8 ++++++--
>  src/intel/compiler/test_eu_validate.cpp   |  3 ++-
>  5 files changed, 22 insertions(+), 12 deletions(-)
> 
> diff --git a/src/intel/compiler/brw_eu.h
> b/src/intel/compiler/brw_eu.h
> index f422595..87c69a4 100644
> --- a/src/intel/compiler/brw_eu.h
> +++ b/src/intel/compiler/brw_eu.h
> @@ -548,7 +548,8 @@ void brw_debug_compact_uncompact(const struct
> gen_device_info *devinfo,
>                                   brw_inst *orig, brw_inst
> *uncompacted);
>  
>  /* brw_eu_validate.c */
> -bool brw_validate_instructions(const struct brw_codegen *p, int
> start_offset,
> +bool brw_validate_instructions(const struct gen_device_info
> *devinfo,
> +                               void *assembly, int start_offset, int
> end_offset,
>                                 struct annotation_info *annotation);
>  
>  static inline int
> diff --git a/src/intel/compiler/brw_eu_validate.c
> b/src/intel/compiler/brw_eu_validate.c
> index f231ea0..39363e4 100644
> --- a/src/intel/compiler/brw_eu_validate.c
> +++ b/src/intel/compiler/brw_eu_validate.c
> @@ -1042,17 +1042,15 @@ region_alignment_rules(const struct
> gen_device_info *devinfo,
>  }
>  
>  bool
> -brw_validate_instructions(const struct brw_codegen *p, int
> start_offset,
> +brw_validate_instructions(const struct gen_device_info *devinfo,
> +                          void *assembly, int start_offset, int
> end_offset,
>                            struct annotation_info *annotation)
>  {
> -   const struct gen_device_info *devinfo = p->devinfo;
> -   const void *store = p->store;
>     bool valid = true;
>  
> -   for (int src_offset = start_offset; src_offset < p-
> >next_insn_offset;
> -        src_offset += sizeof(brw_inst)) {
> +   for (int src_offset = start_offset; src_offset < end_offset;) {

I think in this patch you still need to do 'src_offset +=
sizeof(brw_inst)' in each iteration. Removing it should wait until your
next patch in this series.

> 

>        struct string error_msg = { .str = NULL, .len = 0 };
> -      const brw_inst *inst = store + src_offset;
> +      const brw_inst *inst = assembly + src_offset;
>  
>        if (is_unsupported_inst(devinfo, inst)) {
>           ERROR("Instruction not supported on this Gen");
> diff --git a/src/intel/compiler/brw_fs_generator.cpp
> b/src/intel/compiler/brw_fs_generator.cpp
> index a7f95cc..2ade486 100644
> --- a/src/intel/compiler/brw_fs_generator.cpp
> +++ b/src/intel/compiler/brw_fs_generator.cpp
> @@ -2167,10 +2167,16 @@ fs_generator::generate_code(const cfg_t *cfg,
> int dispatch_width)
>     annotation_finalize(&annotation, p->next_insn_offset);
>  
>  #ifndef NDEBUG
> -   bool validated = brw_validate_instructions(p, start_offset,
> &annotation);
> +   bool validated = brw_validate_instructions(devinfo, p->store,
> +                                              start_offset,
> +                                              p->next_insn_offset,
> +                                              &annotation);
>  #else
>     if (unlikely(debug_flag))
> -      brw_validate_instructions(p, start_offset, &annotation);
> +      brw_validate_instructions(devinfo, p->store,
> +                                start_offset,
> +                                p->next_insn_offset,
> +                                &annotation);
>  #endif
>  
>     int before_size = p->next_insn_offset - start_offset;
> diff --git a/src/intel/compiler/brw_vec4_generator.cpp
> b/src/intel/compiler/brw_vec4_generator.cpp
> index e786ac6..2a7f9c1 100644
> --- a/src/intel/compiler/brw_vec4_generator.cpp
> +++ b/src/intel/compiler/brw_vec4_generator.cpp
> @@ -2187,10 +2187,14 @@ generate_code(struct brw_codegen *p,
>     annotation_finalize(&annotation, p->next_insn_offset);
>  
>  #ifndef NDEBUG
> -   bool validated = brw_validate_instructions(p, 0, &annotation);
> +   bool validated = brw_validate_instructions(devinfo, p->store,
> +                                              0, p-
> >next_insn_offset,
> +                                              &annotation);
>  #else
>     if (unlikely(debug_flag))
> -      brw_validate_instructions(p, 0, &annotation);
> +      brw_validate_instructions(devinfo, p->store,
> +                                0, p->next_insn_offset,
> +                                &annotation);
>  #endif
>  
>     int before_size = p->next_insn_offset;
> diff --git a/src/intel/compiler/test_eu_validate.cpp
> b/src/intel/compiler/test_eu_validate.cpp
> index 76652dc..ed67c4d 100644
> --- a/src/intel/compiler/test_eu_validate.cpp
> +++ b/src/intel/compiler/test_eu_validate.cpp
> @@ -118,7 +118,8 @@ validate(struct brw_codegen *p)
>        annotation.ann[annotation.ann_count].offset = p-
> >next_insn_offset;
>     }
>  
> -   bool ret = brw_validate_instructions(p, 0, &annotation);
> +   bool ret = brw_validate_instructions(devinfo, p->store, 0,
> +                                        p->next_insn_offset,
> &annotation);
>  
>     if (print) {
>        dump_assembly(p->store, annotation.ann_count, annotation.ann,
> p->devinfo);


More information about the mesa-dev mailing list