[Mesa-dev] [PATCH] i965: Drop "Destination Element Offset" from Ironlake SGVs.

Rafael Antognolli rafael.antognolli at intel.com
Wed May 3 23:40:13 UTC 2017


Reviewed-by: Rafael Antognolli <rafael.antognolli at intel.com>

On Fri, Apr 28, 2017 at 05:04:05PM -0700, Kenneth Graunke wrote:
> The Ironlake documentation is terrible, so it's unclear whether or not
> this field exists there.  It definitely doesn't exist on Sandybridge
> and later.  It definitely does exist on G45.
> 
> We haven't been setting it for our normal vertex attributes - just
> the SGVs (VertexID, InstanceID, BaseVertex, BaseInstance, DrawID).
> We should be consistent.  My guess is that it isn't necessary and
> doesn't exist - this patch drops it from the SGVs elements, making
> them follow the behavior of most attributes.
> ---
>  src/mesa/drivers/dri/i965/brw_draw_upload.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c
> index 7846293cb1b..002e863a649 100644
> --- a/src/mesa/drivers/dri/i965/brw_draw_upload.c
> +++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c
> @@ -1096,7 +1096,8 @@ brw_emit_vertices(struct brw_context *brw)
>           dw0 |= BRW_VE0_VALID |
>                  brw->vb.nr_buffers << BRW_VE0_INDEX_SHIFT |
>                  ISL_FORMAT_R32G32_UINT << BRW_VE0_FORMAT_SHIFT;
> -	 dw1 |= (i * 4) << BRW_VE1_DST_OFFSET_SHIFT;
> +         if (brw->gen == 4)
> +            dw1 |= (i * 4) << BRW_VE1_DST_OFFSET_SHIFT;
>        }
>  
>        /* Note that for gl_VertexID, gl_InstanceID, and gl_PrimitiveID values,
> @@ -1124,7 +1125,8 @@ brw_emit_vertices(struct brw_context *brw)
>                  ((brw->vb.nr_buffers + 1) << BRW_VE0_INDEX_SHIFT) |
>                  (ISL_FORMAT_R32_UINT << BRW_VE0_FORMAT_SHIFT);
>  
> -	 dw1 |= (i * 4) << BRW_VE1_DST_OFFSET_SHIFT;
> +         if (brw->gen == 4)
> +            dw1 |= (i * 4) << BRW_VE1_DST_OFFSET_SHIFT;
>        }
>  
>        OUT_BATCH(dw0);
> -- 
> 2.12.2
> 


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