[Mesa-dev] [PATCH 2/3] i965: Port 3DSTATE_VF to genxml and simplify the implementation.

[Kenneth Graunke]

The whole "it might be used for non-indexed draws" thing is no longer
true - it turns out this was a mistake, and removed in OpenGL 4.5.
(See Marek's commit 96cbc1ca29e0b1f4f4d6c868b8449999aecb9080.)  So
we can simplify this and just program 0 for non-indexed draws.

We can also use #if blocks to remove the atom on Ivybridge/Baytrail,
now that they have a separate atom list from Haswell.  No more runtime
checks.
---
 src/mesa/drivers/dri/i965/brw_primitive_restart.c | 40 -----------------------
 src/mesa/drivers/dri/i965/brw_state.h             |  1 -
 src/mesa/drivers/dri/i965/genX_state_upload.c     | 31 ++++++++++++++++--
 3 files changed, 29 insertions(+), 43 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_primitive_restart.c b/src/mesa/drivers/dri/i965/brw_primitive_restart.c
index 8e5a58af404..3dc221e1cfb 100644
--- a/src/mesa/drivers/dri/i965/brw_primitive_restart.c
+++ b/src/mesa/drivers/dri/i965/brw_primitive_restart.c
@@ -177,43 +177,3 @@ brw_handle_primitive_restart(struct gl_context *ctx,
    /* The primitive restart draw was completed, so return true. */
    return GL_TRUE;
 }
-
-static void
-haswell_upload_cut_index(struct brw_context *brw)
-{
-   struct gl_context *ctx = &brw->ctx;
-
-   /* Don't trigger on Ivybridge */
-   if (brw->gen < 8 && !brw->is_haswell)
-      return;
-
-   const unsigned cut_index_setting =
-      ctx->Array._PrimitiveRestart ? HSW_CUT_INDEX_ENABLE : 0;
-
-   /* BRW_NEW_INDEX_BUFFER */
-   unsigned cut_index;
-   if (brw->ib.ib) {
-      cut_index = _mesa_primitive_restart_index(ctx, brw->ib.index_size);
-   } else {
-      /* There's no index buffer, but primitive restart may still apply
-       * to glDrawArrays and such.  FIXED_INDEX mode only applies to drawing
-       * operations that use an index buffer, so we can ignore it and use
-       * the GL restart index directly.
-       */
-      cut_index = ctx->Array.RestartIndex;
-   }
-
-   BEGIN_BATCH(2);
-   OUT_BATCH(_3DSTATE_VF << 16 | cut_index_setting | (2 - 2));
-   OUT_BATCH(cut_index);
-   ADVANCE_BATCH();
-}
-
-const struct brw_tracked_state haswell_cut_index = {
-   .dirty = {
-      .mesa  = _NEW_TRANSFORM,
-      .brw   = BRW_NEW_BLORP |
-               BRW_NEW_INDEX_BUFFER,
-   },
-   .emit = haswell_upload_cut_index,
-};
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index d2d3d7c2c0d..7eda06c81d1 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -113,7 +113,6 @@ extern const struct brw_tracked_state gen7_depthbuffer;
 extern const struct brw_tracked_state gen7_l3_state;
 extern const struct brw_tracked_state gen7_push_constant_space;
 extern const struct brw_tracked_state gen7_urb;
-extern const struct brw_tracked_state haswell_cut_index;
 extern const struct brw_tracked_state gen8_index_buffer;
 extern const struct brw_tracked_state gen8_pma_fix;
 extern const struct brw_tracked_state gen8_vf_topology;
diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c
index ceeacfcdef7..70fca34e4fb 100644
--- a/src/mesa/drivers/dri/i965/genX_state_upload.c
+++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
@@ -53,6 +53,7 @@
 #include "main/shaderapi.h"
 #include "main/stencil.h"
 #include "main/transformfeedback.h"
+#include "main/varray.h"
 #include "main/viewport.h"
 
 UNUSED static void *
@@ -837,6 +838,30 @@ static const struct brw_tracked_state genX(vertices) = {
    .emit = genX(emit_vertices),
 };
 
+#if GEN_IS_HASWELL || GEN_GEN >= 8
+static void
+genX(upload_cut_index)(struct brw_context *brw)
+{
+   const struct gl_context *ctx = &brw->ctx;
+
+   brw_batch_emit(brw, GENX(3DSTATE_VF), vf) {
+      if (ctx->Array._PrimitiveRestart && brw->ib.ib) {
+         vf.IndexedDrawCutIndexEnable = true;
+         vf.CutIndex = _mesa_primitive_restart_index(ctx, brw->ib.index_size);
+      }
+   }
+}
+
+const struct brw_tracked_state genX(cut_index) = {
+   .dirty = {
+      .mesa  = _NEW_TRANSFORM,
+      .brw   = BRW_NEW_BLORP |
+               BRW_NEW_INDEX_BUFFER,
+   },
+   .emit = genX(upload_cut_index),
+};
+#endif
+
 #if GEN_GEN >= 6
 /**
  * Determine the appropriate attribute override value to store into the
@@ -4005,7 +4030,9 @@ genX(init_atoms)(struct brw_context *brw)
       &brw_index_buffer,
       &genX(vertices),
 
-      &haswell_cut_index,
+#if GEN_IS_HASWELL
+      &genX(cut_index),
+#endif
    };
 #elif GEN_GEN >= 8
    static const struct brw_tracked_state *render_atoms[] =
@@ -4098,7 +4125,7 @@ genX(init_atoms)(struct brw_context *brw)
       &gen8_index_buffer,
       &genX(vertices),
 
-      &haswell_cut_index,
+      &genX(cut_index),
       &gen8_pma_fix,
    };
 #endif
-- 
2.12.2