[Mesa-dev] [PATCH 2/2] i965: Drop INTEL_DEBUG=stats.
Kenneth Graunke
kenneth at whitecape.org
Tue May 9 08:48:58 UTC 2017
For whatever reason, we had an INTEL_DEBUG=stats option that enabled
various statistics counters on Gen4-5 systems. It's been around
forever, though I can't think of a single time that it's been useful.
On Gen6+, we enable statistics all the time because they're necessary
to support various query object targets. Turning them off would break
those queries.
Gen4-5 don't support those queries, so the statistics counters generally
aren't useful; we disabled them by default. This patch disables them
altogether.
---
docs/envvars.html | 1 -
src/intel/common/gen_debug.c | 1 -
src/intel/common/gen_debug.h | 2 +-
src/mesa/drivers/dri/i965/brw_cc.c | 2 +-
src/mesa/drivers/dri/i965/brw_clip_state.c | 3 ---
src/mesa/drivers/dri/i965/brw_gs_state.c | 3 ---
src/mesa/drivers/dri/i965/brw_sf_state.c | 3 ---
src/mesa/drivers/dri/i965/brw_vs_state.c | 4 ----
src/mesa/drivers/dri/i965/brw_wm_state.c | 2 +-
9 files changed, 3 insertions(+), 18 deletions(-)
diff --git a/docs/envvars.html b/docs/envvars.html
index 05afd2d5529..e075c20536a 100644
--- a/docs/envvars.html
+++ b/docs/envvars.html
@@ -195,7 +195,6 @@ See the <a href="xlibdriver.html">Xlib software driver page</a> for details.
<li>spill_fs - force spilling of all registers in the scalar backend (useful to debug spilling code)</li>
<li>spill_vec4 - force spilling of all registers in the vec4 backend (useful to debug spilling code)</li>
<li>state - emit messages about state flag tracking</li>
- <li>stats - enable statistics counters. you probably actually want perfmon or intel_gpu_top instead.</li>
<li>sync - after sending each batch, emit a message and wait for that batch to finish rendering</li>
<li>tcs - dump shader assembly for tessellation control shaders</li>
<li>tes - dump shader assembly for tessellation evaluation shaders</li>
diff --git a/src/intel/common/gen_debug.c b/src/intel/common/gen_debug.c
index be6fcdb3bdc..f5702f009bc 100644
--- a/src/intel/common/gen_debug.c
+++ b/src/intel/common/gen_debug.c
@@ -57,7 +57,6 @@ static const struct debug_control debug_control[] = {
{ "vert", DEBUG_VERTS },
{ "dri", DEBUG_DRI },
{ "sf", DEBUG_SF },
- { "stats", DEBUG_STATS },
{ "wm", DEBUG_WM },
{ "urb", DEBUG_URB },
{ "vs", DEBUG_VS },
diff --git a/src/intel/common/gen_debug.h b/src/intel/common/gen_debug.h
index c0b74ea2afe..f7f59c9b5d8 100644
--- a/src/intel/common/gen_debug.h
+++ b/src/intel/common/gen_debug.h
@@ -57,7 +57,7 @@ extern uint64_t INTEL_DEBUG;
#define DEBUG_VERTS (1ull << 13)
#define DEBUG_DRI (1ull << 14)
#define DEBUG_SF (1ull << 15)
-#define DEBUG_STATS (1ull << 16)
+/* Hole - feel free to reuse (1ull << 16) */
#define DEBUG_WM (1ull << 17)
#define DEBUG_URB (1ull << 18)
#define DEBUG_VS (1ull << 19)
diff --git a/src/mesa/drivers/dri/i965/brw_cc.c b/src/mesa/drivers/dri/i965/brw_cc.c
index 21b01f3bb18..62e81253cc9 100644
--- a/src/mesa/drivers/dri/i965/brw_cc.c
+++ b/src/mesa/drivers/dri/i965/brw_cc.c
@@ -226,7 +226,7 @@ static void upload_cc_unit(struct brw_context *brw)
cc->cc2.depth_write_enable = brw_depth_writes_enabled(brw);
}
- if (brw->stats_wm || unlikely(INTEL_DEBUG & DEBUG_STATS))
+ if (brw->stats_wm)
cc->cc5.statistics_enable = 1;
/* BRW_NEW_CC_VP */
diff --git a/src/mesa/drivers/dri/i965/brw_clip_state.c b/src/mesa/drivers/dri/i965/brw_clip_state.c
index 5e084a9961d..d5fe2b547fa 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_state.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_state.c
@@ -114,9 +114,6 @@ brw_upload_clip_unit(struct brw_context *brw)
clip->thread4.max_threads = 1 - 1;
}
- if (unlikely(INTEL_DEBUG & DEBUG_STATS))
- clip->thread4.stats_enable = 1;
-
/* _NEW_TRANSFORM */
if (brw->gen == 5 || brw->is_g4x)
clip->clip5.userclip_enable_flags = ctx->Transform.ClipPlanesEnabled;
diff --git a/src/mesa/drivers/dri/i965/brw_gs_state.c b/src/mesa/drivers/dri/i965/brw_gs_state.c
index ed9ae44bcdb..72ad044f6c7 100644
--- a/src/mesa/drivers/dri/i965/brw_gs_state.c
+++ b/src/mesa/drivers/dri/i965/brw_gs_state.c
@@ -80,9 +80,6 @@ brw_upload_gs_unit(struct brw_context *brw)
if (brw->gen == 5)
gs->thread4.rendering_enable = 1;
- if (unlikely(INTEL_DEBUG & DEBUG_STATS))
- gs->thread4.stats_enable = 1;
-
/* BRW_NEW_VIEWPORT_COUNT */
gs->gs6.max_vp_index = brw->clip.viewport_count - 1;
diff --git a/src/mesa/drivers/dri/i965/brw_sf_state.c b/src/mesa/drivers/dri/i965/brw_sf_state.c
index d50ceb12133..4ba57c30dfd 100644
--- a/src/mesa/drivers/dri/i965/brw_sf_state.c
+++ b/src/mesa/drivers/dri/i965/brw_sf_state.c
@@ -174,9 +174,6 @@ static void upload_sf_unit( struct brw_context *brw )
sf->thread4.max_threads = MIN2(chipset_max_threads,
brw->urb.nr_sf_entries) - 1;
- if (unlikely(INTEL_DEBUG & DEBUG_STATS))
- sf->thread4.stats_enable = 1;
-
/* BRW_NEW_SF_VP */
sf->sf5.sf_viewport_state_offset = (brw->batch.bo->offset64 +
brw->sf.vp_offset) >> 5; /* reloc */
diff --git a/src/mesa/drivers/dri/i965/brw_vs_state.c b/src/mesa/drivers/dri/i965/brw_vs_state.c
index 8a94eb2869c..df34a466ea1 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_state.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_state.c
@@ -146,10 +146,6 @@ brw_upload_vs_unit(struct brw_context *brw)
vs->vs5.sampler_count = (stage_state->sampler_count + 3) / 4;
}
-
- if (unlikely(INTEL_DEBUG & DEBUG_STATS))
- vs->thread4.stats_enable = 1;
-
/* Vertex program always enabled:
*/
vs->vs6.vs_enable = 1;
diff --git a/src/mesa/drivers/dri/i965/brw_wm_state.c b/src/mesa/drivers/dri/i965/brw_wm_state.c
index 5da7d6dd391..f018fddbe83 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_state.c
@@ -217,7 +217,7 @@ brw_upload_wm_unit(struct brw_context *brw)
wm->wm5.line_stipple = ctx->Line.StippleFlag;
/* BRW_NEW_STATS_WM */
- if (unlikely(INTEL_DEBUG & DEBUG_STATS) || brw->stats_wm)
+ if (brw->stats_wm)
wm->wm4.stats_enable = 1;
/* Emit scratch space relocation */
--
2.12.2
More information about the mesa-dev
mailing list