[Mesa-dev] [PATCH] intel/anv, genxml: Pull address canonicalization into a common header
Jason Ekstrand
jason at jlekstrand.net
Thu May 11 17:22:27 UTC 2017
---
src/intel/common/gen_utils.h | 50 +++++++++++++++++++++++++++++++++++++
src/intel/genxml/gen_pack_header.py | 14 +++--------
src/intel/vulkan/anv_batch_chain.c | 13 ++--------
3 files changed, 55 insertions(+), 22 deletions(-)
create mode 100644 src/intel/common/gen_utils.h
diff --git a/src/intel/common/gen_utils.h b/src/intel/common/gen_utils.h
new file mode 100644
index 0000000..04251d5
--- /dev/null
+++ b/src/intel/common/gen_utils.h
@@ -0,0 +1,50 @@
+ /*
+ * Copyright © 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#ifndef GEN_UTILS_H
+#define GEN_UTILS_H
+
+#include <stdint.h>
+
+/** Canonicalize a 48-bit address
+ *
+ * From the Broadwell PRM Vol. 2a, MI_LOAD_REGISTER_MEM::MemoryAddress:
+ *
+ * "This field specifies the address of the memory location where the
+ * register value specified in the DWord above will read from. The
+ * address specifies the DWord location of the data. Range =
+ * GraphicsVirtualAddress[63:2] for a DWord register GraphicsAddress
+ * [63:48] are ignored by the HW and assumed to be in correct
+ * canonical form [63:48] == [47]."
+ *
+ * This is required for all 48-bit addresses on gen8+.
+ */
+static inline uint64_t
+gen8_canonicalize_address(uint64_t address)
+{
+ const int shift = 63 - 47;
+ return (((int64_t)address) << shift) >> shift;
+}
+
+#endif /* GEN_UTILS_H */
diff --git a/src/intel/genxml/gen_pack_header.py b/src/intel/genxml/gen_pack_header.py
index df71689..50097c1 100644
--- a/src/intel/genxml/gen_pack_header.py
+++ b/src/intel/genxml/gen_pack_header.py
@@ -49,6 +49,8 @@ pack_header = """%(license)s
#include <assert.h>
#include <math.h>
+#include "common/gen_utils.h"
+
#ifndef __gen_validate_value
#define __gen_validate_value(x)
#endif
@@ -177,17 +179,7 @@ __gen_address(__gen_user_data *data, void *location, __gen_address_type addr,
uint64_t offset = __gen_combine_address(data, location, addr, delta);
if (end >= 32) {
- /* From the Broadwell PRM Vol. 2a, MI_LOAD_REGISTER_MEM::MemoryAddress:
- *
- * "This field specifies the address of the memory location where the
- * register value specified in the DWord above will read from. The
- * address specifies the DWord location of the data. Range =
- * GraphicsVirtualAddress[63:2] for a DWord register GraphicsAddress
- * [63:48] are ignored by the HW and assumed to be in correct
- * canonical form [63:48] == [47]."
- */
- const int shift = 63 - 47;
- return (((int64_t)offset) << shift) >> shift;
+ return gen8_canonicalize_address(offset);
} else {
return offset;
}
diff --git a/src/intel/vulkan/anv_batch_chain.c b/src/intel/vulkan/anv_batch_chain.c
index b0cd3f7..52ad12f 100644
--- a/src/intel/vulkan/anv_batch_chain.c
+++ b/src/intel/vulkan/anv_batch_chain.c
@@ -28,6 +28,7 @@
#include <fcntl.h>
#include "anv_private.h"
+#include "common/gen_utils.h"
#include "genxml/gen8_pack.h"
@@ -1090,18 +1091,8 @@ write_reloc(const struct anv_device *device, void *p, uint64_t v, bool flush)
{
unsigned reloc_size = 0;
if (device->info.gen >= 8) {
- /* From the Broadwell PRM Vol. 2a, MI_LOAD_REGISTER_MEM::MemoryAddress:
- *
- * "This field specifies the address of the memory location where the
- * register value specified in the DWord above will read from. The
- * address specifies the DWord location of the data. Range =
- * GraphicsVirtualAddress[63:2] for a DWord register GraphicsAddress
- * [63:48] are ignored by the HW and assumed to be in correct
- * canonical form [63:48] == [47]."
- */
- const int shift = 63 - 47;
reloc_size = sizeof(uint64_t);
- *(uint64_t *)p = (((int64_t)v) << shift) >> shift;
+ *(uint64_t *)p = gen8_canonicalize_address(v);
} else {
reloc_size = sizeof(uint32_t);
*(uint32_t *)p = v;
--
2.5.0.400.gff86faf
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