[Mesa-dev] [PATCH 14/24] i965/cnl: Handle gen10 in switch cases across the driver
Jason Ekstrand
jason at jlekstrand.net
Sat May 13 16:47:19 UTC 2017
Most of these still point to gen9 functions even though we have gen10
versions now. We should point to the gen10 versions. Yes, I know some of
that is in a later patch but I see no reason why we can't roll those into
this patch and also fix up blorp and the few other things in this patch
while were here.
On May 12, 2017 4:40:20 PM Anuj Phogat <anuj.phogat at gmail.com> wrote:
> We are still using some gen9 functions for gen10 in this patch.
> They will be replaced by gen10 functions in later patches.
>
> Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
> ---
> src/intel/common/gen_l3_config.c | 1 +
> src/intel/compiler/brw_eu.c | 2 ++
> src/intel/compiler/brw_eu_compact.c | 1 +
> src/intel/isl/isl.c | 3 +++
> src/intel/vulkan/anv_cmd_buffer.c | 1 +
> src/intel/vulkan/anv_device.c | 1 +
> src/intel/vulkan/anv_entrypoints_gen.py | 1 +
> src/mesa/drivers/dri/i965/brw_blorp.c | 1 +
> src/mesa/drivers/dri/i965/brw_formatquery.c | 1 +
> src/mesa/drivers/dri/i965/intel_screen.c | 1 +
> 10 files changed, 13 insertions(+)
>
> diff --git a/src/intel/common/gen_l3_config.c
> b/src/intel/common/gen_l3_config.c
> index 0783217..4fe3503 100644
> --- a/src/intel/common/gen_l3_config.c
> +++ b/src/intel/common/gen_l3_config.c
> @@ -116,6 +116,7 @@ get_l3_configs(const struct gen_device_info *devinfo)
> return (devinfo->is_cherryview ? chv_l3_configs : bdw_l3_configs);
>
> case 9:
> + case 10:
> return chv_l3_configs;
>
> default:
> diff --git a/src/intel/compiler/brw_eu.c b/src/intel/compiler/brw_eu.c
> index 77400c1..2c0dc27 100644
> --- a/src/intel/compiler/brw_eu.c
> +++ b/src/intel/compiler/brw_eu.c
> @@ -412,6 +412,7 @@ enum gen {
> GEN75 = (1 << 5),
> GEN8 = (1 << 6),
> GEN9 = (1 << 7),
> + GEN10 = (1 << 8),
> GEN_ALL = ~0
> };
>
> @@ -688,6 +689,7 @@ gen_from_devinfo(const struct gen_device_info *devinfo)
> case 7: return devinfo->is_haswell ? GEN75 : GEN7;
> case 8: return GEN8;
> case 9: return GEN9;
> + case 10: return GEN10;
> default:
> unreachable("not reached");
> }
> diff --git a/src/intel/compiler/brw_eu_compact.c
> b/src/intel/compiler/brw_eu_compact.c
> index b2af76d..740a395 100644
> --- a/src/intel/compiler/brw_eu_compact.c
> +++ b/src/intel/compiler/brw_eu_compact.c
> @@ -1362,6 +1362,7 @@ brw_init_compaction_tables(const struct
> gen_device_info *devinfo)
> assert(gen8_src_index_table[ARRAY_SIZE(gen8_src_index_table) - 1] != 0);
>
> switch (devinfo->gen) {
> + case 10:
> case 9:
> case 8:
> control_index_table = gen8_control_index_table;
> diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
> index f89f351..5dc41fa 100644
> --- a/src/intel/isl/isl.c
> +++ b/src/intel/isl/isl.c
> @@ -1672,6 +1672,7 @@ isl_surf_fill_state_s(const struct isl_device *dev,
> void *state,
> isl_gen8_surf_fill_state_s(dev, state, info);
> break;
> case 9:
> + case 10:
> isl_gen9_surf_fill_state_s(dev, state, info);
> break;
> default:
> @@ -1703,6 +1704,7 @@ isl_buffer_fill_state_s(const struct isl_device *dev,
> void *state,
> isl_gen8_buffer_fill_state_s(state, info);
> break;
> case 9:
> + case 10:
> isl_gen9_buffer_fill_state_s(state, info);
> break;
> default:
> @@ -1770,6 +1772,7 @@ isl_emit_depth_stencil_hiz_s(const struct isl_device
> *dev, void *batch,
> isl_gen8_emit_depth_stencil_hiz_s(dev, batch, info);
> break;
> case 9:
> + case 10:
> isl_gen9_emit_depth_stencil_hiz_s(dev, batch, info);
> break;
> default:
> diff --git a/src/intel/vulkan/anv_cmd_buffer.c
> b/src/intel/vulkan/anv_cmd_buffer.c
> index 120b864..d34f9f8 100644
> --- a/src/intel/vulkan/anv_cmd_buffer.c
> +++ b/src/intel/vulkan/anv_cmd_buffer.c
> @@ -334,6 +334,7 @@ anv_cmd_buffer_emit_state_base_address(struct
> anv_cmd_buffer *cmd_buffer)
> case 8:
> return gen8_cmd_buffer_emit_state_base_address(cmd_buffer);
> case 9:
> + case 10:
> return gen9_cmd_buffer_emit_state_base_address(cmd_buffer);
> default:
> unreachable("unsupported gen\n");
> diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
> index 35e4030..455c5f9 100644
> --- a/src/intel/vulkan/anv_device.c
> +++ b/src/intel/vulkan/anv_device.c
> @@ -1141,6 +1141,7 @@ VkResult anv_CreateDevice(
> result = gen8_init_device_state(device);
> break;
> case 9:
> + case 10:
> result = gen9_init_device_state(device);
> break;
> default:
> diff --git a/src/intel/vulkan/anv_entrypoints_gen.py
> b/src/intel/vulkan/anv_entrypoints_gen.py
> index a21228c..f293848 100644
> --- a/src/intel/vulkan/anv_entrypoints_gen.py
> +++ b/src/intel/vulkan/anv_entrypoints_gen.py
> @@ -183,6 +183,7 @@ TEMPLATE_C = Template(textwrap.dedent(u"""\
> }
>
> switch (devinfo->gen) {
> + case 10:
> case 9:
> if (gen9_layer.entrypoints[index])
> return gen9_layer.entrypoints[index];
> diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c
> b/src/mesa/drivers/dri/i965/brw_blorp.c
> index b69cb4f..8a6cc66 100644
> --- a/src/mesa/drivers/dri/i965/brw_blorp.c
> +++ b/src/mesa/drivers/dri/i965/brw_blorp.c
> @@ -94,6 +94,7 @@ brw_blorp_init(struct brw_context *brw)
> brw->blorp.exec = gen8_blorp_exec;
> break;
> case 9:
> + case 10:
> brw->blorp.mocs.tex = SKL_MOCS_WB;
> brw->blorp.mocs.rb = SKL_MOCS_PTE;
> brw->blorp.mocs.vb = SKL_MOCS_WB;
> diff --git a/src/mesa/drivers/dri/i965/brw_formatquery.c
> b/src/mesa/drivers/dri/i965/brw_formatquery.c
> index 96cc6e0..5faf91f 100644
> --- a/src/mesa/drivers/dri/i965/brw_formatquery.c
> +++ b/src/mesa/drivers/dri/i965/brw_formatquery.c
> @@ -37,6 +37,7 @@ brw_query_samples_for_format(struct gl_context *ctx,
> GLenum target,
> (void) internalFormat;
>
> switch (brw->gen) {
> + case 10:
> case 9:
> samples[0] = 16;
> samples[1] = 8;
> diff --git a/src/mesa/drivers/dri/i965/intel_screen.c
> b/src/mesa/drivers/dri/i965/intel_screen.c
> index 65a0b5c..ec4a3e0 100644
> --- a/src/mesa/drivers/dri/i965/intel_screen.c
> +++ b/src/mesa/drivers/dri/i965/intel_screen.c
> @@ -1678,6 +1678,7 @@ set_max_gl_versions(struct intel_screen *screen)
> const bool has_astc = screen->devinfo.gen >= 9;
>
> switch (screen->devinfo.gen) {
> + case 10:
> case 9:
> case 8:
> dri_screen->max_gl_core_version = 45;
> --
> 2.9.3
>
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