[Mesa-dev] [PATCH 11/24] ac: add radeon_info::num_{sdma, compute}_rings
Nicolai Hähnle
nhaehnle at gmail.com
Sun May 14 21:46:57 UTC 2017
From: Nicolai Hähnle <nicolai.haehnle at amd.com>
Vulkan needs them.
---
src/amd/common/ac_gpu_info.c | 15 +++++++++++++--
src/amd/common/ac_gpu_info.h | 3 ++-
src/gallium/drivers/radeon/r600_pipe_common.c | 4 ++--
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 4 ++--
4 files changed, 19 insertions(+), 7 deletions(-)
diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index d1cd0c1..cf5d6e1 100644
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -81,21 +81,21 @@ static unsigned cik_get_num_tile_pipes(struct amdgpu_gpu_info *info)
return 2;
}
}
bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
struct radeon_info *info,
struct amdgpu_gpu_info *amdinfo)
{
struct amdgpu_buffer_size_alignments alignment_info = {};
struct amdgpu_heap_info vram, vram_vis, gtt;
- struct drm_amdgpu_info_hw_ip dma = {}, uvd = {}, vce = {};
+ struct drm_amdgpu_info_hw_ip dma = {}, compute = {}, uvd = {}, vce = {};
uint32_t vce_version = 0, vce_feature = 0, uvd_version = 0, uvd_feature = 0;
uint32_t unused_feature;
int r, i, j;
drmDevicePtr devinfo;
/* Get PCI info. */
r = drmGetDevice2(fd, 0, &devinfo);
if (r) {
fprintf(stderr, "amdgpu: drmGetDevice2 failed.\n");
return false;
@@ -138,20 +138,26 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
fprintf(stderr, "amdgpu: amdgpu_query_heap_info(gtt) failed.\n");
return false;
}
r = amdgpu_query_hw_ip_info(dev, AMDGPU_HW_IP_DMA, 0, &dma);
if (r) {
fprintf(stderr, "amdgpu: amdgpu_query_hw_ip_info(dma) failed.\n");
return false;
}
+ r = amdgpu_query_hw_ip_info(dev, AMDGPU_HW_IP_COMPUTE, 0, &compute);
+ if (r) {
+ fprintf(stderr, "amdgpu: amdgpu_query_hw_ip_info(compute) failed.\n");
+ return false;
+ }
+
r = amdgpu_query_hw_ip_info(dev, AMDGPU_HW_IP_UVD, 0, &uvd);
if (r) {
fprintf(stderr, "amdgpu: amdgpu_query_hw_ip_info(uvd) failed.\n");
return false;
}
r = amdgpu_query_firmware_version(dev, AMDGPU_INFO_FW_GFX_ME, 0, 0,
&info->me_fw_version, &unused_feature);
if (r) {
fprintf(stderr, "amdgpu: amdgpu_query_firmware_version(me) failed.\n");
@@ -247,21 +253,26 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
if (info->chip_class == GFX9) {
info->num_tile_pipes = 1 << G_0098F8_NUM_PIPES(amdinfo->gb_addr_cfg);
info->pipe_interleave_bytes =
256 << G_0098F8_PIPE_INTERLEAVE_SIZE_GFX9(amdinfo->gb_addr_cfg);
} else {
info->num_tile_pipes = cik_get_num_tile_pipes(amdinfo);
info->pipe_interleave_bytes =
256 << G_0098F8_PIPE_INTERLEAVE_SIZE_GFX6(amdinfo->gb_addr_cfg);
}
info->has_virtual_memory = true;
- info->has_sdma = dma.available_rings != 0;
+
+ assert(util_is_power_of_two(dma.available_rings + 1));
+ assert(util_is_power_of_two(compute.available_rings + 1));
+
+ info->num_sdma_rings = util_bitcount(dma.available_rings);
+ info->num_compute_rings = util_bitcount(compute.available_rings);
/* Get the number of good compute units. */
info->num_good_compute_units = 0;
for (i = 0; i < info->max_se; i++)
for (j = 0; j < info->max_sh_per_se; j++)
info->num_good_compute_units +=
util_bitcount(amdinfo->cu_bitmap[i][j]);
memcpy(info->si_tile_mode_array, amdinfo->gb_tile_mode,
sizeof(amdinfo->gb_tile_mode));
diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h
index 0dd7dc7..9bf2b84 100644
--- a/src/amd/common/ac_gpu_info.h
+++ b/src/amd/common/ac_gpu_info.h
@@ -43,22 +43,23 @@ struct radeon_info {
enum chip_class chip_class;
uint32_t gart_page_size;
uint64_t gart_size;
uint64_t vram_size;
uint64_t vram_vis_size;
uint64_t max_alloc_size;
uint32_t min_alloc_size;
bool has_dedicated_vram;
bool has_virtual_memory;
bool gfx_ib_pad_with_type2;
- bool has_sdma;
bool has_uvd;
+ uint32_t num_sdma_rings;
+ uint32_t num_compute_rings;
uint32_t uvd_fw_version;
uint32_t vce_fw_version;
uint32_t me_fw_version;
uint32_t pfp_fw_version;
uint32_t ce_fw_version;
uint32_t vce_harvest_config;
uint32_t clock_crystal_freq;
uint32_t tcc_cache_line_size;
/* Kernel info. */
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index 19b8341..dd5796c 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -664,21 +664,21 @@ bool r600_common_context_init(struct r600_common_context *rctx,
rctx->b.const_uploader = u_upload_create(&rctx->b, 128 * 1024,
0, PIPE_USAGE_DEFAULT);
if (!rctx->b.const_uploader)
return false;
rctx->ctx = rctx->ws->ctx_create(rctx->ws);
if (!rctx->ctx)
return false;
- if (rscreen->info.has_sdma && !(rscreen->debug_flags & DBG_NO_ASYNC_DMA)) {
+ if (rscreen->info.num_sdma_rings && !(rscreen->debug_flags & DBG_NO_ASYNC_DMA)) {
rctx->dma.cs = rctx->ws->cs_create(rctx->ctx, RING_DMA,
r600_flush_dma_ring,
rctx);
rctx->dma.flush = r600_flush_dma_ring;
}
return true;
}
void r600_common_context_cleanup(struct r600_common_context *rctx)
@@ -1382,21 +1382,21 @@ bool r600_common_screen_init(struct r600_common_screen *rscreen,
printf("family = %i (%s)\n", rscreen->info.family,
r600_get_chip_name(rscreen));
printf("chip_class = %i\n", rscreen->info.chip_class);
printf("gart_size = %i MB\n", (int)DIV_ROUND_UP(rscreen->info.gart_size, 1024*1024));
printf("vram_size = %i MB\n", (int)DIV_ROUND_UP(rscreen->info.vram_size, 1024*1024));
printf("vram_vis_size = %i MB\n", (int)DIV_ROUND_UP(rscreen->info.vram_vis_size, 1024*1024));
printf("max_alloc_size = %i MB\n",
(int)DIV_ROUND_UP(rscreen->info.max_alloc_size, 1024*1024));
printf("has_virtual_memory = %i\n", rscreen->info.has_virtual_memory);
printf("gfx_ib_pad_with_type2 = %i\n", rscreen->info.gfx_ib_pad_with_type2);
- printf("has_sdma = %i\n", rscreen->info.has_sdma);
+ printf("num_sdma_rings = %i\n", rscreen->info.num_sdma_rings);
printf("has_uvd = %i\n", rscreen->info.has_uvd);
printf("me_fw_version = %i\n", rscreen->info.me_fw_version);
printf("pfp_fw_version = %i\n", rscreen->info.pfp_fw_version);
printf("ce_fw_version = %i\n", rscreen->info.ce_fw_version);
printf("vce_fw_version = %i\n", rscreen->info.vce_fw_version);
printf("vce_harvest_config = %i\n", rscreen->info.vce_harvest_config);
printf("clock_crystal_freq = %i\n", rscreen->info.clock_crystal_freq);
printf("drm = %i.%i.%i\n", rscreen->info.drm_major,
rscreen->info.drm_minor, rscreen->info.drm_patchlevel);
printf("has_userptr = %i\n", rscreen->info.has_userptr);
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index 2e7bfe9..ff22b65 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -298,24 +298,24 @@ static bool do_winsys_init(struct radeon_drm_winsys *ws)
case CHIP_KABINI:
case CHIP_MULLINS:
ws->info.has_dedicated_vram = false;
break;
default:
ws->info.has_dedicated_vram = true;
}
/* Check for dma */
- ws->info.has_sdma = false;
+ ws->info.num_sdma_rings = 0;
/* DMA is disabled on R700. There is IB corruption and hangs. */
if (ws->info.chip_class >= EVERGREEN && ws->info.drm_minor >= 27) {
- ws->info.has_sdma = true;
+ ws->info.num_sdma_rings = 1;
}
/* Check for UVD and VCE */
ws->info.has_uvd = false;
ws->info.vce_fw_version = 0x00000000;
if (ws->info.drm_minor >= 32) {
uint32_t value = RADEON_CS_RING_UVD;
if (radeon_get_drm_value(ws->fd, RADEON_INFO_RING_WORKING,
"UVD Ring working", &value))
ws->info.has_uvd = value;
--
2.9.3
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