[Mesa-dev] [v3 06/19] i965/gen6: Add back-to-back size and offset calculators

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_tex_layout.c    | 52 +++++++++++++++++++++++++++
 src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 11 ++++++
 2 files changed, 63 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index 6f65334..3fbc9cf 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -687,3 +687,55 @@ gen6_back_to_back_minify(const struct isl_surf *surf, unsigned levels)
 
    return s;
 }
+
+uint32_t
+gen6_back_to_back_total_height(const struct isl_extent4d *phys_level0_sa,
+                               const struct isl_extent3d *image_align_sa,
+                               enum isl_surf_dim dim,
+                               enum isl_tiling tiling, uint32_t levels)
+{
+   assert(tiling == ISL_TILING_W ||
+          tiling == ISL_TILING_HIZ); 
+   const uint32_t tile_align_h = tiling == ISL_TILING_W ? 64 : 32;
+
+   uint32_t total_h = 0;
+   for (unsigned i = 0; i < levels; ++i) {
+      const unsigned d = dim == ISL_SURF_DIM_3D ?
+         isl_minify(phys_level0_sa->depth, i) : phys_level0_sa->array_len;
+      const unsigned h = isl_minify(phys_level0_sa->height, i);
+      total_h += d * isl_align_npot(h, image_align_sa->h);
+
+      /* Align on tile boundary so that driver can offset without intra-tile
+       * offsets.
+       */
+      total_h = isl_align(total_h, tile_align_h);
+   }
+
+   return total_h;
+}
+
+void
+gen6_back_to_back_offset(const struct isl_surf *surf,
+                         uint32_t level, uint32_t layer,
+                         uint32_t *x_offset_sa, uint32_t *y_offset_sa)
+{
+   assert(level < surf->levels);
+
+   const struct isl_extent3d image_align_sa =
+      isl_surf_get_image_alignment_sa(surf);
+   const uint32_t y = gen6_back_to_back_total_height(&surf->phys_level0_sa,
+                                                     &image_align_sa,
+                                                     surf->dim, surf->tiling,
+                                                     level);
+
+   const unsigned level_h = isl_minify(surf->phys_level0_sa.height, level);
+   const unsigned aligned_level_h = isl_align_npot(level_h, image_align_sa.h);
+
+   if (surf->dim == ISL_SURF_DIM_3D)
+      assert(layer < surf->logical_level0_px.depth);
+   else
+      assert(layer < surf->logical_level0_px.array_len);
+
+   *x_offset_sa = 0;
+   *y_offset_sa = y + layer * aligned_level_h;
+}
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index d004820..d23ff66 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -1008,6 +1008,17 @@ intel_miptree_sample_with_hiz(struct brw_context *brw,
 struct isl_surf
 gen6_back_to_back_minify(const struct isl_surf *surf, unsigned levels);
 
+uint32_t
+gen6_back_to_back_total_height(const struct isl_extent4d *phys_level0_sa,
+                               const struct isl_extent3d *image_align_sa,
+                               enum isl_surf_dim dim,
+                               enum isl_tiling tiling, uint32_t levels);
+
+void
+gen6_back_to_back_offset(const struct isl_surf *surf,
+                         uint32_t level, uint32_t layer,
+                         uint32_t *x_offset_sa, uint32_t *y_offset_sa);
+
 #ifdef __cplusplus
 }
 #endif
-- 
2.9.3