[Mesa-dev] [PATCH V2 15/24] i965/cnl: Start using CNL MOCS defines

Anuj Phogat anuj.phogat at gmail.com
Tue May 16 23:01:30 UTC 2017


On Tue, May 16, 2017 at 10:34 AM, Anuj Phogat <anuj.phogat at gmail.com> wrote:
> CNL MOCS defines are duplicates of SKL MOCS defines.
>
I can actually drop this patch and continue using SKL MOCS defines for gen10+.
I also noticed that vulkan needs separate MOCS defines for each gen. Any
preferences for GL driver?

> V2: Rebased.
>
> Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
> ---
>  src/mesa/drivers/dri/i965/brw_blorp.c            | 6 +++---
>  src/mesa/drivers/dri/i965/brw_state.h            | 8 ++++++++
>  src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 2 ++
>  src/mesa/drivers/dri/i965/genX_state_upload.c    | 4 +++-
>  4 files changed, 16 insertions(+), 4 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
> index 8d3bcbb..bcc72df 100644
> --- a/src/mesa/drivers/dri/i965/brw_blorp.c
> +++ b/src/mesa/drivers/dri/i965/brw_blorp.c
> @@ -100,9 +100,9 @@ brw_blorp_init(struct brw_context *brw)
>        brw->blorp.exec = gen9_blorp_exec;
>        break;
>     case 10:
> -      brw->blorp.mocs.tex = SKL_MOCS_WB;
> -      brw->blorp.mocs.rb = SKL_MOCS_PTE;
> -      brw->blorp.mocs.vb = SKL_MOCS_WB;
> +      brw->blorp.mocs.tex = CNL_MOCS_WB;
> +      brw->blorp.mocs.rb = CNL_MOCS_PTE;
> +      brw->blorp.mocs.vb = CNL_MOCS_WB;
>        brw->blorp.exec = gen10_blorp_exec;
>        break;
>     default:
> diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
> index 4592e3e..4503946 100644
> --- a/src/mesa/drivers/dri/i965/brw_state.h
> +++ b/src/mesa/drivers/dri/i965/brw_state.h
> @@ -410,6 +410,14 @@ void upload_gs_state_for_tf(struct brw_context *brw);
>  /* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */
>  #define SKL_MOCS_PTE (1 << 1)
>
> +/* Cannonlake: MOCS is now an index into an array of 62 different caching
> + * configurations programmed by the kernel.
> + */
> +/* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */
> +#define CNL_MOCS_WB  (2 << 1)
> +/* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */
> +#define CNL_MOCS_PTE (1 << 1)
> +
>  #ifdef __cplusplus
>  }
>  #endif
> diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> index c95fb37..c1003cd 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> @@ -64,12 +64,14 @@ uint32_t tex_mocs[] = {
>     [7] = GEN7_MOCS_L3,
>     [8] = BDW_MOCS_WB,
>     [9] = SKL_MOCS_WB,
> +   [10] = CNL_MOCS_WB,
>  };
>
>  uint32_t rb_mocs[] = {
>     [7] = GEN7_MOCS_L3,
>     [8] = BDW_MOCS_PTE,
>     [9] = SKL_MOCS_PTE,
> +   [10] = CNL_MOCS_PTE,
>  };
>
>  static void
> diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c
> index 6619d4d..5710878 100644
> --- a/src/mesa/drivers/dri/i965/genX_state_upload.c
> +++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
> @@ -333,7 +333,9 @@ genX(emit_vertex_buffer_state)(struct brw_context *brw,
>  #endif
>  #endif
>
> -#if GEN_GEN == 9
> +#if GEN_GEN == 10
> +      .VertexBufferMOCS = CNL_MOCS_WB,
> +#elif GEN_GEN == 9
>        .VertexBufferMOCS = SKL_MOCS_WB,
>  #elif GEN_GEN == 8
>        .VertexBufferMOCS = BDW_MOCS_WB,
> --
> 2.9.3
>


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