[Mesa-dev] [PATCH 09/10] radeonsi: remove CE offset alignment restriction

[Nicolai Hähnle]

On 17.05.2017 21:38, Marek Olšák wrote:
> From: Marek Olšák <marek.olsak at amd.com>
>
> This was only needed by LOAD_CONST_RAM, which is now only used to load
> whole CE.
> ---
>  src/gallium/drivers/radeonsi/si_descriptors.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
> index a2f40a8..af174d5 100644
> --- a/src/gallium/drivers/radeonsi/si_descriptors.c
> +++ b/src/gallium/drivers/radeonsi/si_descriptors.c
> @@ -107,21 +107,21 @@ static void si_init_descriptors(struct si_descriptors *desc,
>  	desc->element_dw_size = element_dw_size;
>  	desc->num_elements = num_elements;
>  	desc->dirty_mask = u_bit_consecutive64(0, num_elements);
>  	desc->shader_userdata_offset = shader_userdata_index * 4;
>
>  	if (ce_offset) {
>  		desc->uses_ce = true;
>  		desc->ce_offset = *ce_offset;
>
>  		/* make sure that ce_offset stays 32 byte aligned */
> -		*ce_offset += align(element_dw_size * num_elements * 4, 32);
> +		*ce_offset += element_dw_size * num_elements * 4;

The comment should be removed. With that fixed, patches 7 & 9:

Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>


>  	}
>  }
>
>  static void si_release_descriptors(struct si_descriptors *desc)
>  {
>  	r600_resource_reference(&desc->buffer, NULL);
>  	FREE(desc->list);
>  }
>
>  static bool si_ce_upload(struct si_context *sctx, unsigned ce_offset, unsigned size,
>


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