[Mesa-dev] [PATCH 13/15] radv: use amdgpu_addr_create
Nicolai Hähnle
nhaehnle at gmail.com
Thu May 18 09:53:55 UTC 2017
From: Nicolai Hähnle <nicolai.haehnle at amd.com>
---
src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c | 69 -----------------
src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.h | 1 -
src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c | 90 ++--------------------
src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.h | 3 -
4 files changed, 5 insertions(+), 158 deletions(-)
diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c
index 3a682c6..508a6d1 100644
--- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c
+++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c
@@ -30,32 +30,20 @@
#include "radv_private.h"
#include "addrlib/addrinterface.h"
#include "util/bitset.h"
#include "radv_amdgpu_winsys.h"
#include "radv_amdgpu_surface.h"
#include "sid.h"
#include "ac_surface.h"
-#ifndef NO_ENTRIES
-#define NO_ENTRIES 32
-#endif
-
-#ifndef NO_MACRO_ENTRIES
-#define NO_MACRO_ENTRIES 16
-#endif
-
-#ifndef CIASICIDGFXENGINE_SOUTHERNISLAND
-#define CIASICIDGFXENGINE_SOUTHERNISLAND 0x0000000A
-#endif
-
static int radv_amdgpu_surface_sanity(const struct ac_surf_info *surf_info,
const struct radeon_surf *surf)
{
unsigned type = RADEON_SURF_GET(surf->flags, TYPE);
if (!(surf->flags & RADEON_SURF_HAS_TILE_MODE_INDEX))
return -EINVAL;
/* all dimension must be at least 1 ! */
if (!surf_info->width || !surf_info->height || !surf_info->depth ||
@@ -96,77 +84,20 @@ static int radv_amdgpu_surface_sanity(const struct ac_surf_info *surf_info,
case RADEON_SURF_TYPE_2D_ARRAY:
if (surf_info->depth > 1)
return -EINVAL;
break;
default:
return -EINVAL;
}
return 0;
}
-static void *ADDR_API radv_allocSysMem(const ADDR_ALLOCSYSMEM_INPUT * pInput)
-{
- return malloc(pInput->sizeInBytes);
-}
-
-static ADDR_E_RETURNCODE ADDR_API radv_freeSysMem(const ADDR_FREESYSMEM_INPUT * pInput)
-{
- free(pInput->pVirtAddr);
- return ADDR_OK;
-}
-
-ADDR_HANDLE radv_amdgpu_addr_create(struct amdgpu_gpu_info *amdinfo, int family, int rev_id,
- enum chip_class chip_class)
-{
- ADDR_CREATE_INPUT addrCreateInput = {0};
- ADDR_CREATE_OUTPUT addrCreateOutput = {0};
- ADDR_REGISTER_VALUE regValue = {0};
- ADDR_CREATE_FLAGS createFlags = {{0}};
- ADDR_E_RETURNCODE addrRet;
-
- addrCreateInput.size = sizeof(ADDR_CREATE_INPUT);
- addrCreateOutput.size = sizeof(ADDR_CREATE_OUTPUT);
-
- regValue.noOfBanks = amdinfo->mc_arb_ramcfg & 0x3;
- regValue.gbAddrConfig = amdinfo->gb_addr_cfg;
- regValue.noOfRanks = (amdinfo->mc_arb_ramcfg & 0x4) >> 2;
-
- regValue.backendDisables = amdinfo->backend_disable[0];
- regValue.pTileConfig = amdinfo->gb_tile_mode;
- regValue.noOfEntries = ARRAY_SIZE(amdinfo->gb_tile_mode);
- if (chip_class == SI) {
- regValue.pMacroTileConfig = NULL;
- regValue.noOfMacroEntries = 0;
- } else {
- regValue.pMacroTileConfig = amdinfo->gb_macro_tile_mode;
- regValue.noOfMacroEntries = ARRAY_SIZE(amdinfo->gb_macro_tile_mode);
- }
-
- createFlags.value = 0;
- createFlags.useTileIndex = 1;
-
- addrCreateInput.chipEngine = CIASICIDGFXENGINE_SOUTHERNISLAND;
- addrCreateInput.chipFamily = family;
- addrCreateInput.chipRevision = rev_id;
- addrCreateInput.createFlags = createFlags;
- addrCreateInput.callbacks.allocSysMem = radv_allocSysMem;
- addrCreateInput.callbacks.freeSysMem = radv_freeSysMem;
- addrCreateInput.callbacks.debugPrint = 0;
- addrCreateInput.regValue = regValue;
-
- addrRet = AddrCreate(&addrCreateInput, &addrCreateOutput);
- if (addrRet != ADDR_OK)
- return NULL;
-
- return addrCreateOutput.hLib;
-}
-
static int radv_compute_level(ADDR_HANDLE addrlib,
const struct ac_surf_info *surf_info,
struct radeon_surf *surf, bool is_stencil,
unsigned level, unsigned type, bool compressed,
ADDR_COMPUTE_SURFACE_INFO_INPUT *AddrSurfInfoIn,
ADDR_COMPUTE_SURFACE_INFO_OUTPUT *AddrSurfInfoOut,
ADDR_COMPUTE_DCCINFO_INPUT *AddrDccIn,
ADDR_COMPUTE_DCCINFO_OUTPUT *AddrDccOut)
{
struct legacy_surf_level *surf_level;
diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.h b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.h
index cdc8c81..a5652a3 100644
--- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.h
+++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.h
@@ -21,13 +21,12 @@
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
#ifndef RADV_AMDGPU_SURFACE_H
#define RADV_AMDGPU_SURFACE_H
#include <amdgpu.h>
void radv_amdgpu_surface_init_functions(struct radv_amdgpu_winsys *ws);
-ADDR_HANDLE radv_amdgpu_addr_create(struct amdgpu_gpu_info *amdinfo, int family, int rev_id, enum chip_class chip_class);
#endif /* RADV_AMDGPU_SURFACE_H */
diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c
index 31b0db9..94fd8b8 100644
--- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c
+++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c
@@ -22,133 +22,53 @@
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
#include "radv_amdgpu_winsys.h"
#include "radv_amdgpu_winsys_public.h"
#include "radv_amdgpu_surface.h"
#include "radv_debug.h"
#include "amdgpu_id.h"
+#include "ac_surface.h"
#include "xf86drm.h"
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <amdgpu_drm.h>
#include <assert.h>
#include "radv_amdgpu_cs.h"
#include "radv_amdgpu_bo.h"
#include "radv_amdgpu_surface.h"
static bool
do_winsys_init(struct radv_amdgpu_winsys *ws, int fd)
{
if (!ac_query_gpu_info(fd, ws->dev, &ws->info, &ws->amdinfo))
- goto fail;
+ return false;
if (ws->info.chip_class >= GFX9) {
fprintf(stderr, "radv: GFX9 is not supported.\n");
- goto fail;
+ return false;
}
- /* family and rev_id are for addrlib */
- switch (ws->info.family) {
- case CHIP_TAHITI:
- ws->family = FAMILY_SI;
- ws->rev_id = SI_TAHITI_P_A0;
- break;
- case CHIP_PITCAIRN:
- ws->family = FAMILY_SI;
- ws->rev_id = SI_PITCAIRN_PM_A0;
- break;
- case CHIP_VERDE:
- ws->family = FAMILY_SI;
- ws->rev_id = SI_CAPEVERDE_M_A0;
- break;
- case CHIP_OLAND:
- ws->family = FAMILY_SI;
- ws->rev_id = SI_OLAND_M_A0;
- break;
- case CHIP_HAINAN:
- ws->family = FAMILY_SI;
- ws->rev_id = SI_HAINAN_V_A0;
- break;
- case CHIP_BONAIRE:
- ws->family = FAMILY_CI;
- ws->rev_id = CI_BONAIRE_M_A0;
- break;
- case CHIP_KAVERI:
- ws->family = FAMILY_KV;
- ws->rev_id = KV_SPECTRE_A0;
- break;
- case CHIP_KABINI:
- ws->family = FAMILY_KV;
- ws->rev_id = KB_KALINDI_A0;
- break;
- case CHIP_HAWAII:
- ws->family = FAMILY_CI;
- ws->rev_id = CI_HAWAII_P_A0;
- break;
- case CHIP_MULLINS:
- ws->family = FAMILY_KV;
- ws->rev_id = ML_GODAVARI_A0;
- break;
- case CHIP_TONGA:
- ws->family = FAMILY_VI;
- ws->rev_id = VI_TONGA_P_A0;
- break;
- case CHIP_ICELAND:
- ws->family = FAMILY_VI;
- ws->rev_id = VI_ICELAND_M_A0;
- break;
- case CHIP_CARRIZO:
- ws->family = FAMILY_CZ;
- ws->rev_id = CARRIZO_A0;
- break;
- case CHIP_STONEY:
- ws->family = FAMILY_CZ;
- ws->rev_id = STONEY_A0;
- break;
- case CHIP_FIJI:
- ws->family = FAMILY_VI;
- ws->rev_id = VI_FIJI_P_A0;
- break;
- case CHIP_POLARIS10:
- ws->family = FAMILY_VI;
- ws->rev_id = VI_POLARIS10_P_A0;
- break;
- case CHIP_POLARIS11:
- ws->family = FAMILY_VI;
- ws->rev_id = VI_POLARIS11_M_A0;
- break;
- case CHIP_POLARIS12:
- ws->family = FAMILY_VI;
- ws->rev_id = VI_POLARIS12_V_A0;
- break;
- default:
- fprintf(stderr, "amdgpu: Unknown family.\n");
- goto fail;
- }
-
- ws->addrlib = radv_amdgpu_addr_create(&ws->amdinfo, ws->family, ws->rev_id, ws->info.chip_class);
+ ws->addrlib = amdgpu_addr_create(&ws->info, &ws->amdinfo);
if (!ws->addrlib) {
fprintf(stderr, "amdgpu: Cannot create addrlib.\n");
- goto fail;
+ return false;
}
ws->info.num_sdma_rings = MIN2(ws->info.num_sdma_rings, MAX_RINGS_PER_TYPE);
ws->info.num_compute_rings = MIN2(ws->info.num_compute_rings, MAX_RINGS_PER_TYPE);
ws->use_ib_bos = ws->info.chip_class >= CIK;
return true;
-fail:
- return false;
}
static void radv_amdgpu_winsys_query_info(struct radeon_winsys *rws,
struct radeon_info *info)
{
*info = ((struct radv_amdgpu_winsys *)rws)->info;
}
static void radv_amdgpu_winsys_destroy(struct radeon_winsys *rws)
{
diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.h b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.h
index 93f4c2c..59e2730 100644
--- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.h
+++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.h
@@ -35,23 +35,20 @@
#include "util/list.h"
struct radv_amdgpu_winsys {
struct radeon_winsys base;
amdgpu_device_handle dev;
struct radeon_info info;
struct amdgpu_gpu_info amdinfo;
ADDR_HANDLE addrlib;
- uint32_t rev_id;
- unsigned family;
-
bool debug_all_bos;
pthread_mutex_t global_bo_list_lock;
struct list_head global_bo_list;
unsigned num_buffers;
bool use_ib_bos;
};
static inline struct radv_amdgpu_winsys *
radv_amdgpu_winsys(struct radeon_winsys *base)
--
2.9.3
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