[Mesa-dev] [PATCH 16/24] i965/cnl: Start using gen10 specific functions

Anuj Phogat anuj.phogat at gmail.com
Thu May 18 17:15:49 UTC 2017


On Fri, May 12, 2017 at 4:38 PM, Anuj Phogat <anuj.phogat at gmail.com> wrote:
> gen10 specific functions:
> isl_gen10*()
> gen10_blorp_exec()
> gen10_init_atoms()
>
> Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
> ---
>  src/intel/isl/isl.c                          | 12 +++++++++---
>  src/mesa/drivers/dri/i965/brw_blorp.c        |  2 +-
>  src/mesa/drivers/dri/i965/brw_state_upload.c |  4 +++-
>  3 files changed, 13 insertions(+), 5 deletions(-)
>
> diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
> index 5dc41fa..0ae72a4 100644
> --- a/src/intel/isl/isl.c
> +++ b/src/intel/isl/isl.c
> @@ -1672,9 +1672,11 @@ isl_surf_fill_state_s(const struct isl_device *dev, void *state,
>        isl_gen8_surf_fill_state_s(dev, state, info);
>        break;
>     case 9:
> -   case 10:
>        isl_gen9_surf_fill_state_s(dev, state, info);
>        break;
> +   case 10:
> +      isl_gen10_surf_fill_state_s(dev, state, info);
> +      break;
>     default:
>        assert(!"Cannot fill surface state for this gen");
>     }
> @@ -1704,9 +1706,11 @@ isl_buffer_fill_state_s(const struct isl_device *dev, void *state,
>        isl_gen8_buffer_fill_state_s(state, info);
>        break;
>     case 9:
> -   case 10:
>        isl_gen9_buffer_fill_state_s(state, info);
>        break;
> +   case 10:
> +      isl_gen10_buffer_fill_state_s(state, info);
> +      break;
>     default:
>        assert(!"Cannot fill surface state for this gen");
>     }
> @@ -1772,9 +1776,11 @@ isl_emit_depth_stencil_hiz_s(const struct isl_device *dev, void *batch,
>        isl_gen8_emit_depth_stencil_hiz_s(dev, batch, info);
>        break;
>     case 9:
> -   case 10:
>        isl_gen9_emit_depth_stencil_hiz_s(dev, batch, info);
>        break;
> +   case 10:
> +      isl_gen10_emit_depth_stencil_hiz_s(dev, batch, info);
> +      break;
>     default:
>        assert(!"Cannot fill surface state for this gen");
>     }
> diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
> index eae925f..bcc72df 100644
> --- a/src/mesa/drivers/dri/i965/brw_blorp.c
> +++ b/src/mesa/drivers/dri/i965/brw_blorp.c
> @@ -103,7 +103,7 @@ brw_blorp_init(struct brw_context *brw)
>        brw->blorp.mocs.tex = CNL_MOCS_WB;
>        brw->blorp.mocs.rb = CNL_MOCS_PTE;
>        brw->blorp.mocs.vb = CNL_MOCS_WB;
> -      brw->blorp.exec = gen9_blorp_exec;
> +      brw->blorp.exec = gen10_blorp_exec;
>        break;
>     default:
>        unreachable("Invalid gen");
> diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
> index bcb7ff1..35962df 100644
> --- a/src/mesa/drivers/dri/i965/brw_state_upload.c
> +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
> @@ -134,7 +134,9 @@ void brw_init_state( struct brw_context *brw )
>
>     brw_init_caches(brw);
>
> -   if (brw->gen >= 9)
> +   if (brw->gen >= 10)
> +      gen10_init_atoms(brw);
> +   else if (brw->gen >= 9)
>        gen9_init_atoms(brw);
>     else if (brw->gen >= 8)
>        gen8_init_atoms(brw);
> --
> 2.9.3
>
I've squashed this patch in below patch:
[PATCH V2 14/24] i965/cnl: Handle gen10 in switch cases across the driver


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