[Mesa-dev] [PATCH 03/16] anv: Handle color layout transitions from the UNINITIALIZED layout

Jason Ekstrand jason at jlekstrand.net
Thu May 18 21:00:50 UTC 2017


This causes dEQP-VK.api.copy_and_blit.resolve_image.partial.* to start
failing due to test bugs.  See CL 1031 for a test fix.
---
 src/intel/vulkan/anv_blorp.c       | 40 ++++++++++++++++++++++++++++++++++++++
 src/intel/vulkan/anv_private.h     |  5 +++++
 src/intel/vulkan/genX_cmd_buffer.c | 25 ++++++++++++++++++++++++
 3 files changed, 70 insertions(+)

diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
index 7b6944a..51964c5 100644
--- a/src/intel/vulkan/anv_blorp.c
+++ b/src/intel/vulkan/anv_blorp.c
@@ -1373,6 +1373,46 @@ void anv_CmdResolveImage(
    blorp_batch_finish(&batch);
 }
 
+void
+anv_image_ccs_ambiguate(struct anv_cmd_buffer *cmd_buffer,
+                        const struct anv_image *image,
+                        const VkImageSubresourceRange *subresourceRange)
+{
+   assert(image->type == VK_IMAGE_TYPE_3D || image->extent.depth == 1);
+
+   struct blorp_batch batch;
+   blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0);
+
+   struct blorp_surf surf;
+   get_blorp_surf_for_anv_image(image, VK_IMAGE_ASPECT_COLOR_BIT,
+                                image->aux_usage, &surf);
+
+   /* We're about to bind a CCS surface and render to it.  Who knows what will
+    * happen to caching at that point.  It's probably best if we don't let
+    * this happen at the same time as other rendering.  Flush the render cache
+    * and stall prior to this operation.
+    */
+   cmd_buffer->state.pending_pipe_bits |=
+      ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT | ANV_PIPE_CS_STALL_BIT;
+
+   const uint32_t level_count = anv_get_levelCount(image, subresourceRange);
+   const uint32_t layer_count = anv_get_layerCount(image, subresourceRange);
+   for (uint32_t l = 0; l < level_count; l++) {
+      const uint32_t level = subresourceRange->baseMipLevel + l;
+
+      for (uint32_t a = 0; a < layer_count; a++) {
+         const uint32_t layer = subresourceRange->baseArrayLayer + a;
+         const uint32_t depth = anv_minify(image->extent.depth, level);
+
+         for (uint32_t z = 0; z < depth; z++)
+            blorp_ccs_ambiguate(&batch, &surf, level, layer, z);
+      }
+   }
+
+   cmd_buffer->state.pending_pipe_bits |=
+      ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT | ANV_PIPE_CS_STALL_BIT;
+}
+
 static void
 ccs_resolve_attachment(struct anv_cmd_buffer *cmd_buffer,
                        struct blorp_batch *batch,
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 9b0dd67..10ad247 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -2064,6 +2064,11 @@ anv_gen8_hiz_op_resolve(struct anv_cmd_buffer *cmd_buffer,
                         const struct anv_image *image,
                         enum blorp_hiz_op op);
 
+void
+anv_image_ccs_ambiguate(struct anv_cmd_buffer *cmd_buffer,
+                        const struct anv_image *image,
+                        const VkImageSubresourceRange *subresourceRange);
+
 enum isl_aux_usage
 anv_layout_to_aux_usage(const struct gen_device_info * const devinfo,
                         const struct anv_image *image,
diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index ef9b7d0..1f30a12 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -388,6 +388,24 @@ transition_depth_buffer(struct anv_cmd_buffer *cmd_buffer,
       anv_gen8_hiz_op_resolve(cmd_buffer, image, hiz_op);
 }
 
+static void
+transition_color_buffer(struct anv_cmd_buffer *cmd_buffer,
+                        const struct anv_image *image,
+                        VkImageLayout initial_layout,
+                        VkImageLayout final_layout,
+                        const VkImageSubresourceRange *subresourceRange)
+{
+   if (image->aux_usage != ISL_AUX_USAGE_CCS_E)
+      return;
+
+   if (initial_layout != VK_IMAGE_LAYOUT_UNDEFINED &&
+       initial_layout != VK_IMAGE_LAYOUT_PREINITIALIZED)
+      return;
+
+#if GEN_GEN >= 9
+   anv_image_ccs_ambiguate(cmd_buffer, image, subresourceRange);
+#endif
+}
 
 /**
  * Setup anv_cmd_state::attachments for vkCmdBeginRenderPass.
@@ -976,6 +994,13 @@ void genX(CmdPipelineBarrier)(
                                  pImageMemoryBarriers[i].oldLayout,
                                  pImageMemoryBarriers[i].newLayout);
       }
+      if (pImageMemoryBarriers[i].subresourceRange.aspectMask &
+          VK_IMAGE_ASPECT_COLOR_BIT) {
+         transition_color_buffer(cmd_buffer, image,
+                                 pImageMemoryBarriers[i].oldLayout,
+                                 pImageMemoryBarriers[i].newLayout,
+                                 &pImageMemoryBarriers[i].subresourceRange);
+      }
    }
 
    cmd_buffer->state.pending_pipe_bits |=
-- 
2.5.0.400.gff86faf



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