[Mesa-dev] [PATCH v13 22/36] i965: Allocate tile aligned height

[Daniel Stone]

From: Ben Widawsky <ben at bwidawsk.net>

This patch shouldn't actually do anything because the libdrm function
should already do this alignment. However, it preps us for a future
patch where we add in the CCS AUX size, and in the process it serves as
a good place to find bisectable issues if libdrm or kernel does
something incorrectly.

v2: Do proper alignment for X tiling, and make sure non-tiled case is
handled (Jason)
v3: Rebase (Daniel)

Cc: Jason Ekstrand <jason at jlekstrand.net>
Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
Acked-by: Daniel Stone <daniels at collabora.com>
Signed-off-by: Daniel Stone <daniels at collabora.com>
---
 src/mesa/drivers/dri/i965/intel_screen.c | 27 +++++++++++++++++++++++----
 1 file changed, 23 insertions(+), 4 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c
index 40d7771080..ab334032fe 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.c
+++ b/src/mesa/drivers/dri/i965/intel_screen.c
@@ -293,10 +293,14 @@ static struct intel_image_format intel_image_formats[] = {
 static const struct {
    uint32_t tiling;
    uint64_t modifier;
+   unsigned height_align;
 } tiling_modifier_map[] = {
-   { .tiling = I915_TILING_NONE, .modifier = DRM_FORMAT_MOD_LINEAR },
-   { .tiling = I915_TILING_X, .modifier = I915_FORMAT_MOD_X_TILED },
-   { .tiling = I915_TILING_Y, .modifier = I915_FORMAT_MOD_Y_TILED },
+   { .tiling = I915_TILING_NONE, .modifier = DRM_FORMAT_MOD_LINEAR,
+     .height_align = 1 },
+   { .tiling = I915_TILING_X, .modifier = I915_FORMAT_MOD_X_TILED,
+     .height_align = 8 },
+   { .tiling = I915_TILING_Y, .modifier = I915_FORMAT_MOD_Y_TILED,
+     .height_align = 32 },
 };
 
 static uint32_t
@@ -325,6 +329,19 @@ tiling_to_modifier(uint32_t tiling)
    unreachable("tiling_to_modifier received unknown tiling mode");
 }
 
+static unsigned
+get_tiled_height(uint32_t tiling, unsigned height)
+{
+   int i;
+
+   for (i = 0; i < ARRAY_SIZE(tiling_modifier_map); i++) {
+      if (tiling_modifier_map[i].tiling == tiling)
+         return ALIGN(height, tiling_modifier_map[i].height_align);
+   }
+
+   unreachable("get_tiled_height received unknown tiling mode");
+}
+
 static void
 intel_image_warn_if_unaligned(__DRIimage *image, const char *func)
 {
@@ -608,6 +625,7 @@ intel_create_image_common(__DRIscreen *dri_screen,
    struct intel_screen *screen = dri_screen->driverPrivate;
    uint32_t tiling;
    uint64_t modifier = DRM_FORMAT_MOD_INVALID;
+   unsigned tiled_height;
    int cpp;
 
    /* Callers of this may specify a modifier, or a dri usage, but not both. The
@@ -639,6 +657,7 @@ intel_create_image_common(__DRIscreen *dri_screen,
       }
    }
    tiling = modifier_to_tiling(modifier);
+   tiled_height = get_tiled_height(tiling, height);
 
    image = intel_allocate_image(screen, format, loaderPrivate);
    if (image == NULL)
@@ -646,7 +665,7 @@ intel_create_image_common(__DRIscreen *dri_screen,
 
    cpp = _mesa_get_format_bytes(image->format);
    image->bo = brw_bo_alloc_tiled(screen->bufmgr, "image",
-                                  width, height, cpp, tiling,
+                                  width, tiled_height, cpp, tiling,
                                   &image->pitch, 0);
    if (image->bo == NULL) {
       free(image);
-- 
2.13.0