[Mesa-dev] [RFC PATCH 53/65] radeonsi: add all resident buffers to the current CS

[Samuel Pitoiset]

Resident buffers have to be added to every new command stream.
Though, this could be slightly improved when current shaders
don't use any bindless textures/images but usually applications
tend to use bindless for almost every draw call, and the winsys
thread might help when buffers are added early.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
---
 src/gallium/drivers/radeonsi/si_descriptors.c | 36 +++++++++++++++++++++++++++
 src/gallium/drivers/radeonsi/si_hw_context.c  |  1 +
 src/gallium/drivers/radeonsi/si_state.h       |  1 +
 3 files changed, 38 insertions(+)

diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index a687506f7f..12f7ead619 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -2527,6 +2527,42 @@ static void si_make_image_handle_resident(struct pipe_context *ctx,
 }
 
 
+void si_all_resident_buffers_begin_new_cs(struct si_context *sctx)
+{
+	unsigned i;
+
+	/* Add all resident descriptors. */
+	for (i = 0; i < sctx->num_resident_descriptors; i++) {
+		struct r600_resource *desc = sctx->resident_descriptors[i];
+
+		radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, desc,
+					  RADEON_USAGE_READ,
+					  RADEON_PRIO_DESCRIPTORS);
+	}
+
+	/* Add all resident texture handles. */
+	for (i = 0; i < sctx->num_resident_tex_handles; i++) {
+		struct si_texture_handle *tex_handle =
+			sctx->resident_tex_handles[i];
+		struct si_sampler_view *sview = tex_handle->view;
+
+		si_sampler_view_add_buffer(sctx, sview->base.texture,
+					   RADEON_USAGE_READ,
+					   sview->is_stencil_sampler, false);
+	}
+
+	/* Add all resident image handles. */
+	for (i = 0; i < sctx->num_resident_img_handles; i++) {
+		struct si_image_handle *img_handle =
+			sctx->resident_img_handles[i];
+		struct pipe_image_view *view = &img_handle->view;
+
+		si_sampler_view_add_buffer(sctx, view->resource,
+					   RADEON_USAGE_READWRITE,
+					   false, false);
+	}
+}
+
 /* INIT/DEINIT/UPLOAD */
 
 /* GFX9 has only 4KB of CE, while previous chips had 32KB. In order
diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c b/src/gallium/drivers/radeonsi/si_hw_context.c
index 92c09cb633..345825af00 100644
--- a/src/gallium/drivers/radeonsi/si_hw_context.c
+++ b/src/gallium/drivers/radeonsi/si_hw_context.c
@@ -235,6 +235,7 @@ void si_begin_new_cs(struct si_context *ctx)
 	si_mark_atom_dirty(ctx, &ctx->b.streamout.enable_atom);
 	si_mark_atom_dirty(ctx, &ctx->b.render_cond_atom);
 	si_all_descriptors_begin_new_cs(ctx);
+	si_all_resident_buffers_begin_new_cs(ctx);
 
 	ctx->b.scissors.dirty_mask = (1 << R600_MAX_VIEWPORTS) - 1;
 	ctx->b.viewports.dirty_mask = (1 << R600_MAX_VIEWPORTS) - 1;
diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h
index 3e9016c84a..e46af570d4 100644
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -323,6 +323,7 @@ bool si_upload_graphics_shader_descriptors(struct si_context *sctx);
 bool si_upload_compute_shader_descriptors(struct si_context *sctx);
 void si_release_all_descriptors(struct si_context *sctx);
 void si_all_descriptors_begin_new_cs(struct si_context *sctx);
+void si_all_resident_buffers_begin_new_cs(struct si_context *sctx);
 void si_upload_const_buffer(struct si_context *sctx, struct r600_resource **rbuffer,
 			    const uint8_t *ptr, unsigned size, uint32_t *const_offset);
 void si_update_all_texture_descriptors(struct si_context *sctx);
-- 
2.13.0