[Mesa-dev] [PATCH 4/6] i965: Drop depth/stencil miptree pointers in alignment workaround

[Topi Pohjolainen]

In brw_workaround_depthstencil_alignment() corresponding
renderbuffers are always set to refer to the same temp miptrees.
There is no need to carry them in context.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_context.h    |  3 ---
 src/mesa/drivers/dri/i965/brw_misc_state.c | 17 +++--------------
 2 files changed, 3 insertions(+), 17 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 379c18f..dda8f80 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1196,9 +1196,6 @@ struct brw_context
     * brw_workaround_depthstencil_alignment().
     */
    struct {
-      struct intel_mipmap_tree *depth_mt;
-      struct intel_mipmap_tree *stencil_mt;
-
       /* Inter-tile (page-aligned) byte offsets. */
       uint32_t depth_offset;
       /* Intra-tile x,y offsets for drawing to combined depth-stencil. Only
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 79d69fa..18febb3 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -216,12 +216,6 @@ brw_workaround_depthstencil_alignment(struct brw_context *brw,
    brw->depthstencil.tile_x = 0;
    brw->depthstencil.tile_y = 0;
    brw->depthstencil.depth_offset = 0;
-   brw->depthstencil.depth_mt = NULL;
-   brw->depthstencil.stencil_mt = NULL;
-   if (depth_irb)
-      brw->depthstencil.depth_mt = depth_mt;
-   if (stencil_irb)
-      brw->depthstencil.stencil_mt = get_stencil_miptree(stencil_irb);
 
    /* Gen6+ doesn't require the workarounds, since we always program the
     * surface state at the start of the whole surface.
@@ -353,19 +347,14 @@ brw_workaround_depthstencil_alignment(struct brw_context *brw,
    brw->depthstencil.tile_x = tile_x;
    brw->depthstencil.tile_y = tile_y;
    if (depth_irb) {
-      depth_mt = depth_irb->mt;
-      brw->depthstencil.depth_mt = depth_mt;
       brw->depthstencil.depth_offset =
-         intel_miptree_get_aligned_offset(depth_mt,
+         intel_miptree_get_aligned_offset(depth_irb->mt,
                                           depth_irb->draw_x & ~tile_mask_x,
                                           depth_irb->draw_y & ~tile_mask_y);
       assert(!intel_renderbuffer_has_hiz(depth_irb));
    }
    if (stencil_irb) {
       stencil_mt = get_stencil_miptree(stencil_irb);
-
-      brw->depthstencil.stencil_mt = stencil_mt;
-
       assert(stencil_mt->format != MESA_FORMAT_S_UINT8);
    }
 }
@@ -378,8 +367,8 @@ brw_emit_depthbuffer(struct brw_context *brw)
    /* _NEW_BUFFERS */
    struct intel_renderbuffer *depth_irb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
    struct intel_renderbuffer *stencil_irb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
-   struct intel_mipmap_tree *depth_mt = brw->depthstencil.depth_mt;
-   struct intel_mipmap_tree *stencil_mt = brw->depthstencil.stencil_mt;
+   struct intel_mipmap_tree *depth_mt = depth_irb ? depth_irb->mt : NULL;
+   struct intel_mipmap_tree *stencil_mt = get_stencil_miptree(stencil_irb);
    uint32_t tile_x = brw->depthstencil.tile_x;
    uint32_t tile_y = brw->depthstencil.tile_y;
    bool hiz = depth_irb && intel_renderbuffer_has_hiz(depth_irb);
-- 
2.9.3