[Mesa-dev] [PATCH v4 4/4] nv50/ir, nvc0: Add support for ARB_post_depth_coverage
Samuel Pitoiset
samuel.pitoiset at gmail.com
Thu May 25 21:20:08 UTC 2017
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
On 05/24/2017 09:42 PM, Lyude wrote:
> This adds support for the GL_arb_post_depth_coverage extension on nvc0
> GPUs, GM200+ and up. Similar to what we do for early fragment testing,
> we only call the method for updating the post depth coverage status for
> fragment programs when it changes.
>
> Signed-off-by: Lyude <lyude at redhat.com>
> ---
> docs/relnotes/17.2.0.html | 1 +
> src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h | 1 +
> src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 3 +++
> src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h | 2 ++
> src/gallium/drivers/nouveau/nvc0/nvc0_program.c | 1 +
> src/gallium/drivers/nouveau/nvc0/nvc0_program.h | 1 +
> src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 2 +-
> src/gallium/drivers/nouveau/nvc0/nvc0_screen.h | 1 +
> src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c | 5 +++++
> 9 files changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/docs/relnotes/17.2.0.html b/docs/relnotes/17.2.0.html
> index 426bb72..135d1e8 100644
> --- a/docs/relnotes/17.2.0.html
> +++ b/docs/relnotes/17.2.0.html
> @@ -44,6 +44,7 @@ Note: some of the new features are only available with certain drivers.
> </p>
>
> <ul>
> +<li>GL_ARB_post_depth_coverage on nvc0 (GM200+)</li>
> <li>GL_ARB_shader_viewport_layer_array on nvc0 (GM200+)</li>
> <li>GL_AMD_vertex_shader_layer on nvc0 (GM200+)</li>
> <li>GL_AMD_vertex_shader_viewport_index on nvc0 (GM200+)</li>
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> index 1962ead..76f08b1 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> @@ -137,6 +137,7 @@ struct nv50_ir_prog_info
> unsigned numColourResults;
> bool writesDepth;
> bool earlyFragTests;
> + bool postDepthCoverage;
> bool separateFragData;
> bool usesDiscard;
> bool persampleInvocation;
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
> index b583001..1264dd4 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
> @@ -1277,6 +1277,9 @@ void Source::scanProperty(const struct tgsi_full_property *prop)
> case TGSI_PROPERTY_FS_EARLY_DEPTH_STENCIL:
> info->prop.fp.earlyFragTests = prop->u[0].Data;
> break;
> + case TGSI_PROPERTY_FS_POST_DEPTH_COVERAGE:
> + info->prop.fp.postDepthCoverage = prop->u[0].Data;
> + break;
> case TGSI_PROPERTY_MUL_ZERO_WINS:
> info->io.mul_zero_wins = prop->u[0].Data;
> break;
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h b/src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h
> index accde94..d7245fb 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h
> @@ -631,6 +631,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
> #define NVC0_3D_UNK0F00__ESIZE 0x00000004
> #define NVC0_3D_UNK0F00__LEN 0x00000004
>
> +#define NVC0_3D_POST_DEPTH_COVERAGE 0x00000f1c
> +
> #define NVE4_3D_UNK0F20(i0) (0x00000f20 + 0x4*(i0))
> #define NVE4_3D_UNK0F20__ESIZE 0x00000004
> #define NVE4_3D_UNK0F20__LEN 0x00000005
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
> index 27740bc..e43a8de 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
> @@ -487,6 +487,7 @@ nvc0_fp_gen_header(struct nvc0_program *fp, struct nv50_ir_prog_info *info)
> fp->fp.early_z = info->prop.fp.earlyFragTests;
> fp->fp.sample_mask_in = info->prop.fp.usesSampleMaskIn;
> fp->fp.reads_framebuffer = info->prop.fp.readsFramebuffer;
> + fp->fp.post_depth_coverage = info->prop.fp.postDepthCoverage;
>
> /* Mark position xy and layer as read */
> if (fp->fp.reads_framebuffer)
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.h b/src/gallium/drivers/nouveau/nvc0/nvc0_program.h
> index 421ca19..b73822e 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.h
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.h
> @@ -50,6 +50,7 @@ struct nvc0_program {
> bool force_persample_interp;
> bool flatshade;
> bool reads_framebuffer;
> + bool post_depth_coverage;
> } fp;
> struct {
> uint32_t tess_mode; /* ~0 if defined by the other stage */
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> index 4a95e73..b29cd7f 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> @@ -261,6 +261,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
> case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
> case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
> case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
> + case PIPE_CAP_POST_DEPTH_COVERAGE:
> return class_3d >= GM200_3D_CLASS;
> case PIPE_CAP_TGSI_BALLOT:
> return class_3d >= NVE4_3D_CLASS;
> @@ -293,7 +294,6 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
> case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
> case PIPE_CAP_INT64_DIVMOD:
> case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
> - case PIPE_CAP_POST_DEPTH_COVERAGE:
> return 0;
>
> case PIPE_CAP_VENDOR_ID:
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h
> index 9e0211b..de0a02d 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h
> @@ -55,6 +55,7 @@ struct nvc0_graph_state {
> uint32_t uniform_buffer_bound[6];
> struct nvc0_transform_feedback_state *tfb;
> bool seamless_cube_map;
> + bool post_depth_coverage;
> };
>
> struct nvc0_screen {
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c b/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
> index a8c814f..697bf49 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
> @@ -146,6 +146,11 @@ nvc0_fragprog_validate(struct nvc0_context *nvc0)
> nvc0->state.early_z_forced = fp->fp.early_z;
> IMMED_NVC0(push, NVC0_3D(FORCE_EARLY_FRAGMENT_TESTS), fp->fp.early_z);
> }
> + if (fp->fp.post_depth_coverage != nvc0->state.post_depth_coverage) {
> + nvc0->state.post_depth_coverage = fp->fp.post_depth_coverage;
> + IMMED_NVC0(push, NVC0_3D(POST_DEPTH_COVERAGE),
> + fp->fp.post_depth_coverage);
> + }
>
> BEGIN_NVC0(push, NVC0_3D(SP_SELECT(5)), 2);
> PUSH_DATA (push, 0x51);
>
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