[Mesa-dev] [PATCH 3/3] anv: Port over CACHE_MODE_1 optimization fix enables from brw.

[Manolova, Plamena]

Looks good to me :)
This series is: Reviewed-by: Plamena Manolova <plamena.manolova at intel.com>

On Wed, May 24, 2017 at 8:56 AM, Kenneth Graunke <kenneth at whitecape.org>
wrote:

> Ben and I haven't observed these to help anything, but they enable
> hardware optimizations for particular cases.  It's probably best to
> enable them ahead of time, before we run into such a case.
> ---
>  src/intel/vulkan/genX_state.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
>
> diff --git a/src/intel/vulkan/genX_state.c b/src/intel/vulkan/genX_state.c
> index bf1217bbcdc..00c4105a825 100644
> --- a/src/intel/vulkan/genX_state.c
> +++ b/src/intel/vulkan/genX_state.c
> @@ -52,6 +52,19 @@ genX(init_device_state)(struct anv_device *device)
>        ps.PipelineSelection = _3D;
>     }
>
> +#if GEN_GEN >= 9
> +   uint32_t cache_mode_1;
> +   anv_pack_struct(&cache_mode_1, GENX(CACHE_MODE_1),
> +                   .PartialResolveDisableInVC = true,
> +                   .PartialResolveDisableInVCMask = true,
> +                   .FloatBlendOptimizationEnable = true,
> +                   .FloatBlendOptimizationEnableMask = true);
> +   anv_batch_emit(&batch, GENX(MI_LOAD_REGISTER_IMM), lri) {
> +      lri.RegisterOffset = GENX(CACHE_MODE_1_num);
> +      lri.DataDWord      = cache_mode_1;
> +   }
> +#endif
> +
>     anv_batch_emit(&batch, GENX(3DSTATE_AA_LINE_PARAMETERS), aa);
>
>     anv_batch_emit(&batch, GENX(3DSTATE_DRAWING_RECTANGLE), rect) {
> --
> 2.12.2
>
> _______________________________________________
> mesa-dev mailing list
> mesa-dev at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <https://lists.freedesktop.org/archives/mesa-dev/attachments/20170529/dab587f5/attachment.html>