[Mesa-dev] [PATCH 3/6] ac: use the ac i8 llvm type

[Timothy Arceri]

---
 src/amd/common/ac_nir_to_llvm.c | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 9c01f0ad37..44137deb09 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -127,21 +127,20 @@ struct nir_to_llvm_context {
 	LLVMValueRef esgs_ring;
 	LLVMValueRef gsvs_ring;
 	LLVMValueRef hs_ring_tess_offchip;
 	LLVMValueRef hs_ring_tess_factor;
 
 	LLVMValueRef prim_mask;
 	LLVMValueRef sample_pos_offset;
 	LLVMValueRef persp_sample, persp_center, persp_centroid;
 	LLVMValueRef linear_sample, linear_center, linear_centroid;
 
-	LLVMTypeRef i8;
 	LLVMTypeRef i16;
 	LLVMTypeRef i64;
 	LLVMTypeRef v2i32;
 	LLVMTypeRef v3i32;
 	LLVMTypeRef v4i32;
 	LLVMTypeRef v8i32;
 	LLVMTypeRef f64;
 	LLVMTypeRef f32;
 	LLVMTypeRef f16;
 	LLVMTypeRef v2f32;
@@ -621,29 +620,29 @@ radv_define_common_user_sgprs_phase1(struct nir_to_llvm_context *ctx,
 {
 	unsigned num_sets = ctx->options->layout ? ctx->options->layout->num_sets : 0;
 	unsigned stage_mask = 1 << stage;
 	if (has_previous_stage)
 		stage_mask |= 1 << previous_stage;
 
 	/* 1 for each descriptor set */
 	if (!user_sgpr_info->indirect_all_descriptor_sets) {
 		for (unsigned i = 0; i < num_sets; ++i) {
 			if (ctx->options->layout->set[i].layout->shader_stages & stage_mask) {
-				add_user_sgpr_array_argument(args, const_array(ctx->i8, 1024 * 1024), &ctx->descriptor_sets[i]);
+				add_user_sgpr_array_argument(args, const_array(ctx->ac.i8, 1024 * 1024), &ctx->descriptor_sets[i]);
 			}
 		}
 	} else
-		add_user_sgpr_array_argument(args, const_array(const_array(ctx->i8, 1024 * 1024), 32), desc_sets);
+		add_user_sgpr_array_argument(args, const_array(const_array(ctx->ac.i8, 1024 * 1024), 32), desc_sets);
 
 	if (ctx->shader_info->info.needs_push_constants) {
 		/* 1 for push constants and dynamic descriptors */
-		add_user_sgpr_array_argument(args, const_array(ctx->i8, 1024 * 1024), &ctx->push_constants);
+		add_user_sgpr_array_argument(args, const_array(ctx->ac.i8, 1024 * 1024), &ctx->push_constants);
 	}
 }
 
 static void
 radv_define_common_user_sgprs_phase2(struct nir_to_llvm_context *ctx,
                                      gl_shader_stage stage,
                                      bool has_previous_stage,
                                      gl_shader_stage previous_stage,
                                      const struct user_sgpr_info *user_sgpr_info,
 				     LLVMValueRef desc_sets,
@@ -918,21 +917,21 @@ static void create_function(struct nir_to_llvm_context *ctx,
 		ctx->shader_info->num_input_vgprs = args.num_vgprs_used;
 
 	assign_arguments(ctx->main_function, &args);
 
 	user_sgpr_idx = 0;
 
 	if (ctx->options->supports_spill || user_sgpr_info.need_ring_offsets) {
 		set_userdata_location_shader(ctx, AC_UD_SCRATCH_RING_OFFSETS, &user_sgpr_idx, 2);
 		if (ctx->options->supports_spill) {
 			ctx->ring_offsets = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.implicit.buffer.ptr",
-							       LLVMPointerType(ctx->i8, CONST_ADDR_SPACE),
+							       LLVMPointerType(ctx->ac.i8, CONST_ADDR_SPACE),
 							       NULL, 0, AC_FUNC_ATTR_READNONE);
 			ctx->ring_offsets = LLVMBuildBitCast(ctx->builder, ctx->ring_offsets,
 							     const_array(ctx->v4i32, 16), "");
 		}
 	}
 	
 	/* For merged shaders the user SGPRs start at 8, with 8 system SGPRs in front (including
 	 * the rw_buffers at s0/s1. With user SGPR0 = s8, lets restart the count from 0 */
 	if (has_previous_stage)
 		user_sgpr_idx = 0;
@@ -990,21 +989,20 @@ static void create_function(struct nir_to_llvm_context *ctx,
 	default:
 		unreachable("Shader stage not implemented");
 	}
 
 	ctx->shader_info->num_user_sgprs = user_sgpr_idx;
 }
 
 static void setup_types(struct nir_to_llvm_context *ctx)
 {
 	ctx->voidt = LLVMVoidTypeInContext(ctx->context);
-	ctx->i8 = LLVMIntTypeInContext(ctx->context, 8);
 	ctx->i16 = LLVMIntTypeInContext(ctx->context, 16);
 	ctx->i64 = LLVMIntTypeInContext(ctx->context, 64);
 	ctx->v2i32 = LLVMVectorType(ctx->ac.i32, 2);
 	ctx->v3i32 = LLVMVectorType(ctx->ac.i32, 3);
 	ctx->v4i32 = LLVMVectorType(ctx->ac.i32, 4);
 	ctx->v8i32 = LLVMVectorType(ctx->ac.i32, 8);
 	ctx->f32 = LLVMFloatTypeInContext(ctx->context);
 	ctx->f16 = LLVMHalfTypeInContext(ctx->context);
 	ctx->f64 = LLVMDoubleTypeInContext(ctx->context);
 	ctx->v2f32 = LLVMVectorType(ctx->f32, 2);
-- 
2.14.3