[Mesa-dev] [PATCH 07/10] ac: use the ac f16 llvm type

[Timothy Arceri]

---
 src/amd/common/ac_nir_to_llvm.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 736131ab56..1e1a1c0276 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -127,21 +127,20 @@ struct nir_to_llvm_context {
 	LLVMValueRef esgs_ring;
 	LLVMValueRef gsvs_ring;
 	LLVMValueRef hs_ring_tess_offchip;
 	LLVMValueRef hs_ring_tess_factor;
 
 	LLVMValueRef prim_mask;
 	LLVMValueRef sample_pos_offset;
 	LLVMValueRef persp_sample, persp_center, persp_centroid;
 	LLVMValueRef linear_sample, linear_center, linear_centroid;
 
-	LLVMTypeRef f16;
 	LLVMTypeRef v2f32;
 	LLVMTypeRef v4f32;
 
 	unsigned uniform_md_kind;
 	LLVMValueRef empty_md;
 	gl_shader_stage stage;
 
 	LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS * 4];
 
 	uint64_t input_mask;
@@ -979,21 +978,20 @@ static void create_function(struct nir_to_llvm_context *ctx,
 		break;
 	default:
 		unreachable("Shader stage not implemented");
 	}
 
 	ctx->shader_info->num_user_sgprs = user_sgpr_idx;
 }
 
 static void setup_types(struct nir_to_llvm_context *ctx)
 {
-	ctx->f16 = LLVMHalfTypeInContext(ctx->context);
 	ctx->v2f32 = LLVMVectorType(ctx->ac.f32, 2);
 	ctx->v4f32 = LLVMVectorType(ctx->ac.f32, 4);
 
 	ctx->uniform_md_kind =
 	    LLVMGetMDKindIDInContext(ctx->context, "amdgpu.uniform", 14);
 	ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
 }
 
 static int get_llvm_num_components(LLVMValueRef value)
 {
@@ -1307,21 +1305,21 @@ static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
 			     ctx->i32, "");
 }
 
 static LLVMValueRef emit_f2f16(struct nir_to_llvm_context *ctx,
 			       LLVMValueRef src0)
 {
 	LLVMValueRef result;
 	LLVMValueRef cond = NULL;
 
 	src0 = ac_to_float(&ctx->ac, src0);
-	result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
+	result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->ac.f16, "");
 
 	if (ctx->options->chip_class >= VI) {
 		LLVMValueRef args[2];
 		/* Check if the result is a denormal - and flush to 0 if so. */
 		args[0] = result;
 		args[1] = LLVMConstInt(ctx->ac.i32, N_SUBNORMAL | P_SUBNORMAL, false);
 		cond = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.class.f16", ctx->ac.i1, args, 2, AC_FUNC_ATTR_READNONE);
 	}
 
 	/* need to convert back up to f32 */
-- 
2.14.3