[Mesa-dev] [PATCH 01/10] ac: add v2i32 to the common code and use it

Nicolai Hähnle nhaehnle at gmail.com
Thu Nov 2 08:16:56 UTC 2017


For the series:

Acked-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

On 02.11.2017 03:41, Timothy Arceri wrote:
> ---
>   src/amd/common/ac_llvm_build.c  |  1 +
>   src/amd/common/ac_llvm_build.h  |  1 +
>   src/amd/common/ac_nir_to_llvm.c | 20 +++++++++-----------
>   3 files changed, 11 insertions(+), 11 deletions(-)
> 
> diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
> index ea238fa006..1a0d44bcdd 100644
> --- a/src/amd/common/ac_llvm_build.c
> +++ b/src/amd/common/ac_llvm_build.c
> @@ -59,20 +59,21 @@ ac_llvm_context_init(struct ac_llvm_context *ctx, LLVMContextRef context,
>   
>   	ctx->voidt = LLVMVoidTypeInContext(ctx->context);
>   	ctx->i1 = LLVMInt1TypeInContext(ctx->context);
>   	ctx->i8 = LLVMInt8TypeInContext(ctx->context);
>   	ctx->i16 = LLVMIntTypeInContext(ctx->context, 16);
>   	ctx->i32 = LLVMIntTypeInContext(ctx->context, 32);
>   	ctx->i64 = LLVMIntTypeInContext(ctx->context, 64);
>   	ctx->f16 = LLVMHalfTypeInContext(ctx->context);
>   	ctx->f32 = LLVMFloatTypeInContext(ctx->context);
>   	ctx->f64 = LLVMDoubleTypeInContext(ctx->context);
> +	ctx->v2i32 = LLVMVectorType(ctx->i32, 2);
>   	ctx->v4i32 = LLVMVectorType(ctx->i32, 4);
>   	ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
>   	ctx->v8i32 = LLVMVectorType(ctx->i32, 8);
>   
>   	ctx->i32_0 = LLVMConstInt(ctx->i32, 0, false);
>   	ctx->i32_1 = LLVMConstInt(ctx->i32, 1, false);
>   	ctx->f32_0 = LLVMConstReal(ctx->f32, 0.0);
>   	ctx->f32_1 = LLVMConstReal(ctx->f32, 1.0);
>   
>   	ctx->i1false = LLVMConstInt(ctx->i1, 0, false);
> diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
> index f790619827..7fc336c3f9 100644
> --- a/src/amd/common/ac_llvm_build.h
> +++ b/src/amd/common/ac_llvm_build.h
> @@ -45,20 +45,21 @@ struct ac_llvm_context {
>   
>   	LLVMTypeRef voidt;
>   	LLVMTypeRef i1;
>   	LLVMTypeRef i8;
>   	LLVMTypeRef i16;
>   	LLVMTypeRef i32;
>   	LLVMTypeRef i64;
>   	LLVMTypeRef f16;
>   	LLVMTypeRef f32;
>   	LLVMTypeRef f64;
> +	LLVMTypeRef v2i32;
>   	LLVMTypeRef v4i32;
>   	LLVMTypeRef v4f32;
>   	LLVMTypeRef v8i32;
>   
>   	LLVMValueRef i32_0;
>   	LLVMValueRef i32_1;
>   	LLVMValueRef f32_0;
>   	LLVMValueRef f32_1;
>   	LLVMValueRef i1true;
>   	LLVMValueRef i1false;
> diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
> index 2437ea05c1..0bcb0b0525 100644
> --- a/src/amd/common/ac_nir_to_llvm.c
> +++ b/src/amd/common/ac_nir_to_llvm.c
> @@ -127,21 +127,20 @@ struct nir_to_llvm_context {
>   	LLVMValueRef esgs_ring;
>   	LLVMValueRef gsvs_ring;
>   	LLVMValueRef hs_ring_tess_offchip;
>   	LLVMValueRef hs_ring_tess_factor;
>   
>   	LLVMValueRef prim_mask;
>   	LLVMValueRef sample_pos_offset;
>   	LLVMValueRef persp_sample, persp_center, persp_centroid;
>   	LLVMValueRef linear_sample, linear_center, linear_centroid;
>   
> -	LLVMTypeRef v2i32;
>   	LLVMTypeRef v3i32;
>   	LLVMTypeRef v4i32;
>   	LLVMTypeRef v8i32;
>   	LLVMTypeRef f64;
>   	LLVMTypeRef f32;
>   	LLVMTypeRef f16;
>   	LLVMTypeRef v2f32;
>   	LLVMTypeRef v4f32;
>   
>   	unsigned uniform_md_kind;
> @@ -870,27 +869,27 @@ static void create_function(struct nir_to_llvm_context *ctx,
>   			add_vgpr_argument(&args, ctx->ac.i32, &ctx->gs_vtx_offset[4]);
>   			add_vgpr_argument(&args, ctx->ac.i32, &ctx->gs_vtx_offset[5]);
>   			add_vgpr_argument(&args, ctx->ac.i32, &ctx->gs_invocation_id);
>   		}
>   		break;
>   	case MESA_SHADER_FRAGMENT:
>   		radv_define_common_user_sgprs_phase1(ctx, stage, has_previous_stage, previous_stage, &user_sgpr_info, &args, &desc_sets);
>   		if (ctx->shader_info->info.ps.needs_sample_positions)
>   			add_user_sgpr_argument(&args, ctx->ac.i32, &ctx->sample_pos_offset); /* sample position offset */
>   		add_sgpr_argument(&args, ctx->ac.i32, &ctx->prim_mask); /* prim mask */
> -		add_vgpr_argument(&args, ctx->v2i32, &ctx->persp_sample); /* persp sample */
> -		add_vgpr_argument(&args, ctx->v2i32, &ctx->persp_center); /* persp center */
> -		add_vgpr_argument(&args, ctx->v2i32, &ctx->persp_centroid); /* persp centroid */
> +		add_vgpr_argument(&args, ctx->ac.v2i32, &ctx->persp_sample); /* persp sample */
> +		add_vgpr_argument(&args, ctx->ac.v2i32, &ctx->persp_center); /* persp center */
> +		add_vgpr_argument(&args, ctx->ac.v2i32, &ctx->persp_centroid); /* persp centroid */
>   		add_vgpr_argument(&args, ctx->v3i32, NULL); /* persp pull model */
> -		add_vgpr_argument(&args, ctx->v2i32, &ctx->linear_sample); /* linear sample */
> -		add_vgpr_argument(&args, ctx->v2i32, &ctx->linear_center); /* linear center */
> -		add_vgpr_argument(&args, ctx->v2i32, &ctx->linear_centroid); /* linear centroid */
> +		add_vgpr_argument(&args, ctx->ac.v2i32, &ctx->linear_sample); /* linear sample */
> +		add_vgpr_argument(&args, ctx->ac.v2i32, &ctx->linear_center); /* linear center */
> +		add_vgpr_argument(&args, ctx->ac.v2i32, &ctx->linear_centroid); /* linear centroid */
>   		add_vgpr_argument(&args, ctx->f32, NULL);  /* line stipple tex */
>   		add_vgpr_argument(&args, ctx->f32, &ctx->abi.frag_pos[0]);  /* pos x float */
>   		add_vgpr_argument(&args, ctx->f32, &ctx->abi.frag_pos[1]);  /* pos y float */
>   		add_vgpr_argument(&args, ctx->f32, &ctx->abi.frag_pos[2]);  /* pos z float */
>   		add_vgpr_argument(&args, ctx->f32, &ctx->abi.frag_pos[3]);  /* pos w float */
>   		add_vgpr_argument(&args, ctx->ac.i32, &ctx->abi.front_face);  /* front face */
>   		add_vgpr_argument(&args, ctx->ac.i32, &ctx->abi.ancillary);  /* ancillary */
>   		add_vgpr_argument(&args, ctx->ac.i32, &ctx->abi.sample_coverage);  /* sample coverage */
>   		add_vgpr_argument(&args, ctx->ac.i32, NULL);  /* fixed pt */
>   		break;
> @@ -985,21 +984,20 @@ static void create_function(struct nir_to_llvm_context *ctx,
>   		break;
>   	default:
>   		unreachable("Shader stage not implemented");
>   	}
>   
>   	ctx->shader_info->num_user_sgprs = user_sgpr_idx;
>   }
>   
>   static void setup_types(struct nir_to_llvm_context *ctx)
>   {
> -	ctx->v2i32 = LLVMVectorType(ctx->ac.i32, 2);
>   	ctx->v3i32 = LLVMVectorType(ctx->ac.i32, 3);
>   	ctx->v4i32 = LLVMVectorType(ctx->ac.i32, 4);
>   	ctx->v8i32 = LLVMVectorType(ctx->ac.i32, 8);
>   	ctx->f32 = LLVMFloatTypeInContext(ctx->context);
>   	ctx->f16 = LLVMHalfTypeInContext(ctx->context);
>   	ctx->f64 = LLVMDoubleTypeInContext(ctx->context);
>   	ctx->v2f32 = LLVMVectorType(ctx->f32, 2);
>   	ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
>   
>   	ctx->uniform_md_kind =
> @@ -1901,39 +1899,39 @@ static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
>   	case nir_op_fddx_fine:
>   	case nir_op_fddy_fine:
>   	case nir_op_fddx_coarse:
>   	case nir_op_fddy_coarse:
>   		result = emit_ddxy(ctx, instr->op, src[0]);
>   		break;
>   
>   	case nir_op_unpack_64_2x32_split_x: {
>   		assert(instr->src[0].src.ssa->num_components == 1);
>   		LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
> -						    LLVMVectorType(ctx->ac.i32, 2),
> +						    ctx->ac.v2i32,
>   						    "");
>   		result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
>   						 ctx->ac.i32_0, "");
>   		break;
>   	}
>   
>   	case nir_op_unpack_64_2x32_split_y: {
>   		assert(instr->src[0].src.ssa->num_components == 1);
>   		LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
> -						    LLVMVectorType(ctx->ac.i32, 2),
> +						    ctx->ac.v2i32,
>   						    "");
>   		result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
>   						 ctx->ac.i32_1, "");
>   		break;
>   	}
>   
>   	case nir_op_pack_64_2x32_split: {
> -		LLVMValueRef tmp = LLVMGetUndef(LLVMVectorType(ctx->ac.i32, 2));
> +		LLVMValueRef tmp = LLVMGetUndef(ctx->ac.v2i32);
>   		tmp = LLVMBuildInsertElement(ctx->ac.builder, tmp,
>   					     src[0], ctx->ac.i32_0, "");
>   		tmp = LLVMBuildInsertElement(ctx->ac.builder, tmp,
>   					     src[1], ctx->ac.i32_1, "");
>   		result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
>   		break;
>   	}
>   
>   	default:
>   		fprintf(stderr, "Unknown NIR alu instr: ");
> 


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