[Mesa-dev] [PATCH 8/9] r600: add support for hw atomic counters. (v2)

[Gert Wollny]

Am Freitag, den 03.11.2017, 17:24 +1000 schrieb Dave Airlie:
> 
> diff --git a/src/gallium/drivers/r600/r600_pipe.c
> b/src/gallium/drivers/r600/r600_pipe.c
> index d67a22b..434596b 100644
> --- a/src/gallium/drivers/r600/r600_pipe.c
> +++ b/src/gallium/drivers/r600/r600_pipe.c
> @@ -74,6 +74,8 @@ static void r600_destroy_context(struct
> pipe_context *context)
>  	r600_resource_reference(&rctx->dummy_cmask, NULL);
>  	r600_resource_reference(&rctx->dummy_fmask, NULL);
>  
> +	if (rctx->append_fence)
> +		pipe_resource_reference((struct
> pipe_resource**)&rctx->append_fence, NULL);
>  	for (sh = 0; sh < PIPE_SHADER_TYPES; sh++) {
>  		rctx->b.b.set_constant_buffer(&rctx->b.b, sh,
> R600_BUFFER_INFO_CONST_BUFFER, NULL);
>  		free(rctx->driver_consts[sh].constants);
> @@ -186,6 +188,9 @@ static struct pipe_context
> *r600_create_context(struct pipe_screen *screen,
>  					   rctx->b.family ==
> CHIP_CAICOS ||
>  					   rctx->b.family ==
> CHIP_CAYMAN ||
>  					   rctx->b.family ==
> CHIP_ARUBA);
> +
> +		rctx->append_fence = pipe_buffer_create(rctx-
> >b.b.screen, PIPE_BIND_CUSTOM,
> +							 PIPE_USAGE_
> DEFAULT, 32);
>  		break;
>  	default:
>  		R600_ERR("Unsupported chip class %d.\n", rctx-
> >b.chip_class);
> @@ -605,7 +610,15 @@ static int r600_get_shader_param(struct
> pipe_screen* pscreen,
>  	case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
>  	case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
>  	case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
> +		if (rscreen->b.family >= CHIP_CEDAR && rscreen-
> >has_atomics)
> +			return 8;
> +		return 0;

I don't think the other cases should fall through. It makes quite a few
piglits fail on BARTS because the number of registers is too high if no
merging is applied. 


Best, 
Gert