[Mesa-dev] [PATCH 1/9] gallium: add CAPs to support HW atomic counters. (v2)
Marek Olšák
maraeo at gmail.com
Sat Nov 4 00:01:37 UTC 2017
Not sure if the "HW" prefix everywhere makes sense since gallium
doesn't imply there is a hardware driver behind it, but I don't really
care much.
Marek
On Fri, Nov 3, 2017 at 8:24 AM, Dave Airlie <airlied at gmail.com> wrote:
> From: Dave Airlie <airlied at redhat.com>
>
> This looks like an evergreen specific feature, but with atomic
> counters AMD have hw specific counters they use instead of operating
> on buffers directly. These are separate to the buffer atomics,
> so require different limits and code paths.
>
> I've left the CAP for atomic type extensible in case someone
> else has a variant on this sort of thing (freedreno maybe?)
> and needs to change it.
>
> This adds all the CAPs required to add support for those atomic
> counters, along with a related CAP for limiting the number of
> output resources.
>
> I'd like to land this and the st patch then I can start to
> upstream the evergreen support for these and other GL4.x features.
>
> v2: drop the ATOMIC_COUNTER_MODE cap, just use the return
> from the HW counters. If 0 we use the current mode.
>
> Signed-off-by: Dave Airlie <airlied at redhat.com>
> ---
> src/gallium/auxiliary/gallivm/lp_bld_limits.h | 2 ++
> src/gallium/auxiliary/tgsi/tgsi_exec.h | 2 ++
> src/gallium/docs/source/screen.rst | 5 ++++-
> src/gallium/drivers/etnaviv/etnaviv_screen.c | 2 ++
> src/gallium/drivers/freedreno/freedreno_screen.c | 2 ++
> src/gallium/drivers/nouveau/nv30/nv30_screen.c | 2 ++
> src/gallium/drivers/nouveau/nv50/nv50_screen.c | 2 ++
> src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 2 ++
> src/gallium/drivers/r300/r300_screen.c | 2 ++
> src/gallium/drivers/r600/r600_pipe.c | 2 ++
> src/gallium/drivers/radeonsi/si_pipe.c | 3 +++
> src/gallium/drivers/svga/svga_screen.c | 4 ++++
> src/gallium/drivers/vc4/vc4_screen.c | 2 ++
> src/gallium/drivers/virgl/virgl_screen.c | 2 ++
> src/gallium/include/pipe/p_defines.h | 2 ++
> 15 files changed, 35 insertions(+), 1 deletion(-)
>
> diff --git a/src/gallium/auxiliary/gallivm/lp_bld_limits.h b/src/gallium/auxiliary/gallivm/lp_bld_limits.h
> index ea320bb..c7755bf 100644
> --- a/src/gallium/auxiliary/gallivm/lp_bld_limits.h
> +++ b/src/gallium/auxiliary/gallivm/lp_bld_limits.h
> @@ -140,6 +140,8 @@ gallivm_get_shader_param(enum pipe_shader_cap param)
> case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
> case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
> case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
> return 0;
> case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
> return 32;
> diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.h b/src/gallium/auxiliary/tgsi/tgsi_exec.h
> index 514c69e..ad920dc 100644
> --- a/src/gallium/auxiliary/tgsi/tgsi_exec.h
> +++ b/src/gallium/auxiliary/tgsi/tgsi_exec.h
> @@ -541,6 +541,8 @@ tgsi_exec_get_shader_param(enum pipe_shader_cap param)
> case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
> case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
> case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
> return 0;
> case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
> return PIPE_MAX_SHADER_BUFFERS;
> diff --git a/src/gallium/docs/source/screen.rst b/src/gallium/docs/source/screen.rst
> index 376b95e..134a10b 100644
> --- a/src/gallium/docs/source/screen.rst
> +++ b/src/gallium/docs/source/screen.rst
> @@ -515,7 +515,10 @@ MOV OUT[0], CONST[0][3] # copy vector 3 of constbuf 0
> * ``PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS``: Whether the merge registers
> TGSI pass is skipped. This might reduce code size and register pressure if
> the underlying driver has a real backend compiler.
> -
> +* ``PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS``: If atomic counters are separate,
> + how many HW counters are available for this stage. (0 uses SSBO atomics).
> +* ``PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS``: If atomic counters are
> + separate, how many atomic counter buffers are available for this stage.
>
> .. _pipe_compute_cap:
>
> diff --git a/src/gallium/drivers/etnaviv/etnaviv_screen.c b/src/gallium/drivers/etnaviv/etnaviv_screen.c
> index 68973be..ca94ed1 100644
> --- a/src/gallium/drivers/etnaviv/etnaviv_screen.c
> +++ b/src/gallium/drivers/etnaviv/etnaviv_screen.c
> @@ -458,6 +458,8 @@ etna_screen_get_shader_param(struct pipe_screen *pscreen,
> case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
> case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
> case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
> return 0;
> }
>
> diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c
> index 30b2ded..f9b38c1 100644
> --- a/src/gallium/drivers/freedreno/freedreno_screen.c
> +++ b/src/gallium/drivers/freedreno/freedreno_screen.c
> @@ -553,6 +553,8 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen,
> return 32;
> case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
> case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
> return 0;
> case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
> if (is_a5xx(screen)) {
> diff --git a/src/gallium/drivers/nouveau/nv30/nv30_screen.c b/src/gallium/drivers/nouveau/nv30/nv30_screen.c
> index 6ebce57..48b134b 100644
> --- a/src/gallium/drivers/nouveau/nv30/nv30_screen.c
> +++ b/src/gallium/drivers/nouveau/nv30/nv30_screen.c
> @@ -328,6 +328,8 @@ nv30_screen_get_shader_param(struct pipe_screen *pscreen,
> case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
> case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
> case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
> return 0;
> default:
> debug_printf("unknown vertex shader param %d\n", param);
> diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
> index 2066cf3..3071f43 100644
> --- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c
> +++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
> @@ -373,6 +373,8 @@ nv50_screen_get_shader_param(struct pipe_screen *pscreen,
> case PIPE_SHADER_CAP_SUPPORTED_IRS:
> case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
> case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
> return 0;
> default:
> NOUVEAU_ERR("unknown PIPE_SHADER_CAP %d\n", param);
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> index d62a555..e7c262a 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> @@ -411,6 +411,8 @@ nvc0_screen_get_shader_param(struct pipe_screen *pscreen,
> case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
> case PIPE_SHADER_CAP_INT64_ATOMICS:
> case PIPE_SHADER_CAP_FP16:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
> return 0;
> case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
> return NVC0_MAX_BUFFERS;
> diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c
> index a245c10..7f8454d 100644
> --- a/src/gallium/drivers/r300/r300_screen.c
> +++ b/src/gallium/drivers/r300/r300_screen.c
> @@ -367,6 +367,8 @@ static int r300_get_shader_param(struct pipe_screen *pscreen,
> case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
> case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
> case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
> return 0;
> case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
> return 32;
> diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
> index 3648f7d..d67a22b 100644
> --- a/src/gallium/drivers/r600/r600_pipe.c
> +++ b/src/gallium/drivers/r600/r600_pipe.c
> @@ -604,6 +604,8 @@ static int r600_get_shader_param(struct pipe_screen* pscreen,
> case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
> case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
> case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
> return 0;
> case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
> /* due to a bug in the shader compiler, some loops hang
> diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
> index 875aff6..39f7b7b 100644
> --- a/src/gallium/drivers/radeonsi/si_pipe.c
> +++ b/src/gallium/drivers/radeonsi/si_pipe.c
> @@ -786,6 +786,9 @@ static int si_get_shader_param(struct pipe_screen* pscreen,
> /* Unsupported boolean features. */
> case PIPE_SHADER_CAP_SUBROUTINES:
> case PIPE_SHADER_CAP_SUPPORTED_IRS:
> + case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
> return 0;
> }
> return 0;
> diff --git a/src/gallium/drivers/svga/svga_screen.c b/src/gallium/drivers/svga/svga_screen.c
> index aede584..d45d943 100644
> --- a/src/gallium/drivers/svga/svga_screen.c
> +++ b/src/gallium/drivers/svga/svga_screen.c
> @@ -539,6 +539,8 @@ vgpu9_get_shader_param(struct pipe_screen *screen,
> case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
> case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
> case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
> return 0;
> case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
> return 32;
> @@ -604,6 +606,8 @@ vgpu9_get_shader_param(struct pipe_screen *screen,
> case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
> case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
> case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
> return 0;
> case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
> return 32;
> diff --git a/src/gallium/drivers/vc4/vc4_screen.c b/src/gallium/drivers/vc4/vc4_screen.c
> index 9ac678d..3c367d1 100644
> --- a/src/gallium/drivers/vc4/vc4_screen.c
> +++ b/src/gallium/drivers/vc4/vc4_screen.c
> @@ -450,6 +450,8 @@ vc4_screen_get_shader_param(struct pipe_screen *pscreen,
> case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
> case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
> case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
> return 0;
> default:
> fprintf(stderr, "unknown shader param %d\n", param);
> diff --git a/src/gallium/drivers/virgl/virgl_screen.c b/src/gallium/drivers/virgl/virgl_screen.c
> index 47e61aa..779644d 100644
> --- a/src/gallium/drivers/virgl/virgl_screen.c
> +++ b/src/gallium/drivers/virgl/virgl_screen.c
> @@ -340,6 +340,8 @@ virgl_get_shader_param(struct pipe_screen *screen,
> case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
> case PIPE_SHADER_CAP_INT64_ATOMICS:
> case PIPE_SHADER_CAP_FP16:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
> + case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
> default:
> return 0;
> }
> diff --git a/src/gallium/include/pipe/p_defines.h b/src/gallium/include/pipe/p_defines.h
> index 2db73c1..63f28ea 100644
> --- a/src/gallium/include/pipe/p_defines.h
> +++ b/src/gallium/include/pipe/p_defines.h
> @@ -852,6 +852,8 @@ enum pipe_shader_cap
> PIPE_SHADER_CAP_LOWER_IF_THRESHOLD,
> PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS,
> PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED,
> + PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS,
> + PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS,
> };
>
> /**
> --
> 2.9.5
>
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