[Mesa-dev] [PATCH] radeonsi/gfx9: limit the scissor bug workaround to Vega10 and Raven only

[Nicolai Hähnle]

Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

On 07.11.2017 16:16, Marek Olšák wrote:
> From: Marek Olšák <marek.olsak at amd.com>
> 
> ---
>   src/gallium/drivers/radeonsi/si_state_draw.c | 8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
> index 2d9fcfe..53f33ca 100644
> --- a/src/gallium/drivers/radeonsi/si_state_draw.c
> +++ b/src/gallium/drivers/radeonsi/si_state_draw.c
> @@ -1398,25 +1398,25 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
>   
>   	si_need_cs_space(sctx);
>   
>   	/* Since we've called r600_context_add_resource_size for vertex buffers,
>   	 * this must be called after si_need_cs_space, because we must let
>   	 * need_cs_space flush before we add buffers to the buffer list.
>   	 */
>   	if (!si_upload_vertex_buffer_descriptors(sctx))
>   		return;
>   
> -	/* GFX9 scissor bug workaround. This must be done before VPORT scissor
> -	 * registers are changed. There is also a more efficient but more
> -	 * involved alternative workaround.
> +	/* Vega10/Raven scissor bug workaround. This must be done before VPORT
> +	 * scissor registers are changed. There is also a more efficient but
> +	 * more involved alternative workaround.
>   	 */
> -	if (sctx->b.chip_class == GFX9 &&
> +	if ((sctx->b.family == CHIP_VEGA10 || sctx->b.family == CHIP_RAVEN) &&
>   	    si_is_atom_dirty(sctx, &sctx->scissors.atom)) {
>   		sctx->b.flags |= SI_CONTEXT_PS_PARTIAL_FLUSH;
>   		si_emit_cache_flush(sctx);
>   	}
>   
>   	/* Use optimal packet order based on whether we need to sync the pipeline. */
>   	if (unlikely(sctx->b.flags & (SI_CONTEXT_FLUSH_AND_INV_CB |
>   				      SI_CONTEXT_FLUSH_AND_INV_DB |
>   				      SI_CONTEXT_PS_PARTIAL_FLUSH |
>   				      SI_CONTEXT_CS_PARTIAL_FLUSH))) {
> 


-- 
Lerne, wie die Welt wirklich ist,
Aber vergiss niemals, wie sie sein sollte.