[Mesa-dev] [PATCH 04/18] winsys/amdgpu: add vcn enc cs support

[boyuan.zhang at amd.com]

From: Boyuan Zhang <boyuan.zhang at amd.com>

New cs support is needed for vcn encode

Signed-off-by: Boyuan Zhang <boyuan.zhang at amd.com>
---
 src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
index 0b47af9..f82b4fb 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
@@ -326,7 +326,8 @@ static bool amdgpu_cs_has_user_fence(struct amdgpu_cs_context *cs)
 {
    return cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_UVD &&
           cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_VCE &&
-          cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_VCN_DEC;
+          cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_VCN_DEC &&
+          cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_VCN_ENC;
 }
 
 static bool amdgpu_cs_has_chaining(struct amdgpu_cs *cs)
@@ -779,6 +780,10 @@ static bool amdgpu_init_cs_context(struct amdgpu_cs_context *cs,
       cs->ib[IB_MAIN].ip_type = AMDGPU_HW_IP_VCN_DEC;
       break;
 
+  case RING_VCN_ENC:
+      cs->ib[IB_MAIN].ip_type = AMDGPU_HW_IP_VCN_ENC;
+      break;
+
    default:
    case RING_GFX:
       cs->ib[IB_MAIN].ip_type = AMDGPU_HW_IP_GFX;
-- 
2.7.4