[Mesa-dev] [PATCH 1/5] ac: mark LDS loads and stores as volatile

Marek Olšák maraeo at gmail.com
Thu Nov 9 22:41:18 UTC 2017


From: Marek Olšák <marek.olsak at amd.com>

LLVM uses arbitrary scheduling if we don't set volatile.

volatile is a keyword, so use Volatile
---
 src/amd/common/ac_llvm_build.c           | 38 ++++++++++++++++----------------
 src/amd/common/ac_llvm_build.h           | 13 ++++-------
 src/amd/common/ac_nir_to_llvm.c          | 20 ++++++++---------
 src/gallium/drivers/radeonsi/si_shader.c |  6 ++---
 4 files changed, 36 insertions(+), 41 deletions(-)

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index 5640a23..a85ffe1 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -700,70 +700,73 @@ ac_build_gep0(struct ac_llvm_context *ctx,
 	      LLVMValueRef index)
 {
 	LLVMValueRef indices[2] = {
 		LLVMConstInt(ctx->i32, 0, 0),
 		index,
 	};
 	return LLVMBuildGEP(ctx->builder, base_ptr,
 			    indices, 2, "");
 }
 
-void
-ac_build_indexed_store(struct ac_llvm_context *ctx,
-		       LLVMValueRef base_ptr, LLVMValueRef index,
-		       LLVMValueRef value)
+static void ac_build_store(struct ac_llvm_context *ctx, LLVMValueRef base_ptr,
+			   LLVMValueRef index, LLVMValueRef value, bool Volatile)
 {
-	LLVMBuildStore(ctx->builder, value,
-		       ac_build_gep0(ctx, base_ptr, index));
+	LLVMValueRef store = LLVMBuildStore(ctx->builder, value,
+					    ac_build_gep0(ctx, base_ptr, index));
+	if (Volatile)
+		LLVMSetVolatile(store, true);
 }
 
 /**
  * Build an LLVM bytecode indexed load using LLVMBuildGEP + LLVMBuildLoad.
  * It's equivalent to doing a load from &base_ptr[index].
  *
  * \param base_ptr  Where the array starts.
  * \param index     The element index into the array.
  * \param uniform   Whether the base_ptr and index can be assumed to be
  *                  dynamically uniform (i.e. load to an SGPR)
  * \param invariant Whether the load is invariant (no other opcodes affect it)
  */
 static LLVMValueRef
 ac_build_load_custom(struct ac_llvm_context *ctx, LLVMValueRef base_ptr,
-		     LLVMValueRef index, bool uniform, bool invariant)
+		     LLVMValueRef index, bool uniform, bool invariant,
+		     bool Volatile)
 {
 	LLVMValueRef pointer, result;
 
 	pointer = ac_build_gep0(ctx, base_ptr, index);
 	if (uniform)
 		LLVMSetMetadata(pointer, ctx->uniform_md_kind, ctx->empty_md);
 	result = LLVMBuildLoad(ctx->builder, pointer, "");
 	if (invariant)
 		LLVMSetMetadata(result, ctx->invariant_load_md_kind, ctx->empty_md);
+	if (Volatile)
+		LLVMSetVolatile(result, true);
 	return result;
 }
 
 LLVMValueRef ac_build_load(struct ac_llvm_context *ctx, LLVMValueRef base_ptr,
 			   LLVMValueRef index)
 {
-	return ac_build_load_custom(ctx, base_ptr, index, false, false);
+	return ac_build_load_custom(ctx, base_ptr, index, false, false, false);
 }
 
 LLVMValueRef ac_build_load_invariant(struct ac_llvm_context *ctx,
 				     LLVMValueRef base_ptr, LLVMValueRef index)
 {
-	return ac_build_load_custom(ctx, base_ptr, index, false, true);
+	return ac_build_load_custom(ctx, base_ptr, index, false, true, false);
 }
 
 LLVMValueRef ac_build_load_to_sgpr(struct ac_llvm_context *ctx,
 				   LLVMValueRef base_ptr, LLVMValueRef index)
 {
-	return ac_build_load_custom(ctx, base_ptr, index, true, true);
+	return ac_build_load_custom(ctx, base_ptr, index, true, true, false);
 }
 
 /* TBUFFER_STORE_FORMAT_{X,XY,XYZ,XYZW} <- the suffix is selected by num_channels=1..4.
  * The type of vdata must be one of i32 (num_channels=1), v2i32 (num_channels=2),
  * or v4i32 (num_channels=3,4).
  */
 void
 ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
 			    LLVMValueRef rsrc,
 			    LLVMValueRef vdata,
@@ -1756,33 +1759,30 @@ void ac_init_exec_full_mask(struct ac_llvm_context *ctx)
 }
 
 void ac_declare_lds_as_pointer(struct ac_llvm_context *ctx)
 {
 	unsigned lds_size = ctx->chip_class >= CIK ? 65536 : 32768;
 	ctx->lds = LLVMBuildIntToPtr(ctx->builder, ctx->i32_0,
 				     LLVMPointerType(LLVMArrayType(ctx->i32, lds_size / 4), AC_LOCAL_ADDR_SPACE),
 				     "lds");
 }
 
-LLVMValueRef ac_lds_load(struct ac_llvm_context *ctx,
-			 LLVMValueRef dw_addr)
+LLVMValueRef ac_lds_load_volatile(struct ac_llvm_context *ctx,
+				  LLVMValueRef dw_addr)
 {
-	return ac_build_load(ctx, ctx->lds, dw_addr);
+	return ac_build_load_custom(ctx, ctx->lds, dw_addr, false, false, true);
 }
 
-void ac_lds_store(struct ac_llvm_context *ctx,
-		  LLVMValueRef dw_addr,
-		  LLVMValueRef value)
+void ac_lds_store_volatile(struct ac_llvm_context *ctx,
+			   LLVMValueRef dw_addr, LLVMValueRef value)
 {
-	value = ac_to_integer(ctx, value);
-	ac_build_indexed_store(ctx, ctx->lds,
-			       dw_addr, value);
+	ac_build_store(ctx, ctx->lds, dw_addr, ac_to_integer(ctx, value), true);
 }
 
 LLVMValueRef ac_find_lsb(struct ac_llvm_context *ctx,
 			 LLVMTypeRef dst_type,
 			 LLVMValueRef src0)
 {
 	LLVMValueRef params[2] = {
 		src0,
 
 		/* The value of 1 means that ffs(x=0) = undef, so LLVM won't
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index 1f51937..e3f716e 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -149,25 +149,20 @@ ac_build_fs_interp_mov(struct ac_llvm_context *ctx,
 		       LLVMValueRef parameter,
 		       LLVMValueRef llvm_chan,
 		       LLVMValueRef attr_number,
 		       LLVMValueRef params);
 
 LLVMValueRef
 ac_build_gep0(struct ac_llvm_context *ctx,
 	      LLVMValueRef base_ptr,
 	      LLVMValueRef index);
 
-void
-ac_build_indexed_store(struct ac_llvm_context *ctx,
-		       LLVMValueRef base_ptr, LLVMValueRef index,
-		       LLVMValueRef value);
-
 LLVMValueRef ac_build_load(struct ac_llvm_context *ctx, LLVMValueRef base_ptr,
 			   LLVMValueRef index);
 LLVMValueRef ac_build_load_invariant(struct ac_llvm_context *ctx,
 				     LLVMValueRef base_ptr, LLVMValueRef index);
 LLVMValueRef ac_build_load_to_sgpr(struct ac_llvm_context *ctx,
 				   LLVMValueRef base_ptr, LLVMValueRef index);
 
 void
 ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
 			    LLVMValueRef rsrc,
@@ -289,23 +284,23 @@ void ac_get_image_intr_name(const char *base_name,
 			    char *out_name, unsigned out_len);
 
 void ac_optimize_vs_outputs(struct ac_llvm_context *ac,
 			    LLVMValueRef main_fn,
 			    uint8_t *vs_output_param_offset,
 			    uint32_t num_outputs,
 			    uint8_t *num_param_exports);
 void ac_init_exec_full_mask(struct ac_llvm_context *ctx);
 
 void ac_declare_lds_as_pointer(struct ac_llvm_context *ac);
-LLVMValueRef ac_lds_load(struct ac_llvm_context *ctx,
-			 LLVMValueRef dw_addr);
-void ac_lds_store(struct ac_llvm_context *ctx,
-		  LLVMValueRef dw_addr, LLVMValueRef value);
+LLVMValueRef ac_lds_load_volatile(struct ac_llvm_context *ctx,
+				  LLVMValueRef dw_addr);
+void ac_lds_store_volatile(struct ac_llvm_context *ctx,
+			   LLVMValueRef dw_addr, LLVMValueRef value);
 
 LLVMValueRef ac_find_lsb(struct ac_llvm_context *ctx,
 			 LLVMTypeRef dst_type,
 			 LLVMValueRef src0);
 #ifdef __cplusplus
 }
 #endif
 
 #endif
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index f922b32..fa30b91 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -2719,21 +2719,21 @@ load_tcs_input(struct nir_to_llvm_context *ctx,
 			 false, NULL, per_vertex ? &vertex_index : NULL,
 			 &const_index, &indir_index);
 
 	stride = unpack_param(&ctx->ac, ctx->tcs_in_layout, 13, 8);
 	dw_addr = get_tcs_in_current_patch_offset(ctx);
 	dw_addr = get_dw_address(ctx, dw_addr, param, const_index, is_compact, vertex_index, stride,
 				 indir_index);
 
 	unsigned comp = instr->variables[0]->var->data.location_frac;
 	for (unsigned i = 0; i < instr->num_components + comp; i++) {
-		value[i] = ac_lds_load(&ctx->ac, dw_addr);
+		value[i] = ac_lds_load_volatile(&ctx->ac, dw_addr);
 		dw_addr = LLVMBuildAdd(ctx->builder, dw_addr,
 				       ctx->ac.i32_1, "");
 	}
 	result = build_varying_gather_values(&ctx->ac, value, instr->num_components, comp);
 	result = LLVMBuildBitCast(ctx->builder, result, get_def_type(ctx->nir, &instr->dest.ssa), "");
 	return result;
 }
 
 static LLVMValueRef
 load_tcs_output(struct nir_to_llvm_context *ctx,
@@ -2758,21 +2758,21 @@ load_tcs_output(struct nir_to_llvm_context *ctx,
 		dw_addr = get_tcs_out_current_patch_offset(ctx);
 	} else {
 		dw_addr = get_tcs_out_current_patch_data_offset(ctx);
 	}
 
 	dw_addr = get_dw_address(ctx, dw_addr, param, const_index, is_compact, vertex_index, stride,
 				 indir_index);
 
 	unsigned comp = instr->variables[0]->var->data.location_frac;
 	for (unsigned i = comp; i < instr->num_components + comp; i++) {
-		value[i] = ac_lds_load(&ctx->ac, dw_addr);
+		value[i] = ac_lds_load_volatile(&ctx->ac, dw_addr);
 		dw_addr = LLVMBuildAdd(ctx->builder, dw_addr,
 				       ctx->ac.i32_1, "");
 	}
 	result = build_varying_gather_values(&ctx->ac, value, instr->num_components, comp);
 	result = LLVMBuildBitCast(ctx->builder, result, get_def_type(ctx->nir, &instr->dest.ssa), "");
 	return result;
 }
 
 static void
 store_tcs_output(struct nir_to_llvm_context *ctx,
@@ -2820,21 +2820,21 @@ store_tcs_output(struct nir_to_llvm_context *ctx,
 	if (instr->variables[0]->var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
 	    instr->variables[0]->var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)
 		is_tess_factor = true;
 
 	unsigned base = is_compact ? const_index : 0;
 	for (unsigned chan = 0; chan < 8; chan++) {
 		if (!(writemask & (1 << chan)))
 			continue;
 		LLVMValueRef value = llvm_extract_elem(&ctx->ac, src, chan - comp);
 
-		ac_lds_store(&ctx->ac, dw_addr, value);
+		ac_lds_store_volatile(&ctx->ac, dw_addr, value);
 
 		if (!is_tess_factor && writemask != 0xF)
 			ac_build_buffer_store_dword(&ctx->ac, ctx->hs_ring_tess_offchip, value, 1,
 						    buf_addr, ctx->oc_lds,
 						    4 * (base + chan), 1, 0, true, false);
 
 		dw_addr = LLVMBuildAdd(ctx->builder, dw_addr,
 				       ctx->ac.i32_1, "");
 	}
 
@@ -2901,21 +2901,21 @@ load_gs_input(struct nir_to_llvm_context *ctx,
 				  LLVMConstInt(ctx->ac.i32, 4, false), "");
 
 	param = shader_io_get_unique_index(instr->variables[0]->var->data.location);
 
 	unsigned comp = instr->variables[0]->var->data.location_frac;
 	for (unsigned i = comp; i < instr->num_components + comp; i++) {
 		if (ctx->ac.chip_class >= GFX9) {
 			LLVMValueRef dw_addr = ctx->gs_vtx_offset[vtx_offset_param];
 			dw_addr = LLVMBuildAdd(ctx->ac.builder, dw_addr,
 			                       LLVMConstInt(ctx->ac.i32, param * 4 + i + const_index, 0), "");
-			value[i] = ac_lds_load(&ctx->ac, dw_addr);
+			value[i] = ac_lds_load_volatile(&ctx->ac, dw_addr);
 		} else {
 			args[0] = ctx->esgs_ring;
 			args[1] = vtx_offset;
 			args[2] = LLVMConstInt(ctx->ac.i32, (param * 4 + i + const_index) * 256, false);
 			args[3] = ctx->ac.i32_0;
 			args[4] = ctx->ac.i32_1; /* OFFEN */
 			args[5] = ctx->ac.i32_0; /* IDXEN */
 			args[6] = ctx->ac.i32_1; /* GLC */
 			args[7] = ctx->ac.i32_0; /* SLC */
 			args[8] = ctx->ac.i32_0; /* TFE */
@@ -5841,21 +5841,21 @@ handle_es_outputs_post(struct nir_to_llvm_context *ctx,
 		if (lds_base) {
 			dw_addr = LLVMBuildAdd(ctx->builder, lds_base,
 			                       LLVMConstInt(ctx->ac.i32, param_index * 4, false),
 			                       "");
 		}
 		for (j = 0; j < length; j++) {
 			LLVMValueRef out_val = LLVMBuildLoad(ctx->builder, out_ptr[j], "");
 			out_val = LLVMBuildBitCast(ctx->builder, out_val, ctx->ac.i32, "");
 
 			if (ctx->ac.chip_class  >= GFX9) {
-				ac_lds_store(&ctx->ac, dw_addr,
+				ac_lds_store_volatile(&ctx->ac, dw_addr,
 					     LLVMBuildLoad(ctx->builder, out_ptr[j], ""));
 				dw_addr = LLVMBuildAdd(ctx->builder, dw_addr, ctx->ac.i32_1, "");
 			} else {
 				ac_build_buffer_store_dword(&ctx->ac,
 				                            ctx->esgs_ring,
 				                            out_val, 1,
 				                            NULL, ctx->es2gs_offset,
 				                            (4 * param_index + j) * 4,
 				                            1, 1, true, true);
 			}
@@ -5881,21 +5881,21 @@ handle_ls_outputs_post(struct nir_to_llvm_context *ctx)
 		if (i == VARYING_SLOT_CLIP_DIST0)
 			length = ctx->num_output_clips + ctx->num_output_culls;
 		int param = shader_io_get_unique_index(i);
 		mark_tess_output(ctx, false, param);
 		if (length > 4)
 			mark_tess_output(ctx, false, param + 1);
 		LLVMValueRef dw_addr = LLVMBuildAdd(ctx->builder, base_dw_addr,
 						    LLVMConstInt(ctx->ac.i32, param * 4, false),
 						    "");
 		for (unsigned j = 0; j < length; j++) {
-			ac_lds_store(&ctx->ac, dw_addr,
+			ac_lds_store_volatile(&ctx->ac, dw_addr,
 				     LLVMBuildLoad(ctx->builder, out_ptr[j], ""));
 			dw_addr = LLVMBuildAdd(ctx->builder, dw_addr, ctx->ac.i32_1, "");
 		}
 	}
 }
 
 struct ac_build_if_state
 {
 	struct nir_to_llvm_context *ctx;
 	LLVMValueRef condition;
@@ -6034,34 +6034,34 @@ write_tess_factors(struct nir_to_llvm_context *ctx)
 	lds_outer = LLVMBuildAdd(ctx->builder, lds_base,
 				 LLVMConstInt(ctx->ac.i32, tess_outer_index * 4, false), "");
 
 	for (i = 0; i < 4; i++) {
 		inner[i] = LLVMGetUndef(ctx->ac.i32);
 		outer[i] = LLVMGetUndef(ctx->ac.i32);
 	}
 
 	// LINES reverseal
 	if (ctx->options->key.tcs.primitive_mode == GL_ISOLINES) {
-		outer[0] = out[1] = ac_lds_load(&ctx->ac, lds_outer);
+		outer[0] = out[1] = ac_lds_load_volatile(&ctx->ac, lds_outer);
 		lds_outer = LLVMBuildAdd(ctx->builder, lds_outer,
 					 LLVMConstInt(ctx->ac.i32, 1, false), "");
-		outer[1] = out[0] = ac_lds_load(&ctx->ac, lds_outer);
+		outer[1] = out[0] = ac_lds_load_volatile(&ctx->ac, lds_outer);
 	} else {
 		for (i = 0; i < outer_comps; i++) {
 			outer[i] = out[i] =
-				ac_lds_load(&ctx->ac, lds_outer);
+				ac_lds_load_volatile(&ctx->ac, lds_outer);
 			lds_outer = LLVMBuildAdd(ctx->builder, lds_outer,
 						 LLVMConstInt(ctx->ac.i32, 1, false), "");
 		}
 		for (i = 0; i < inner_comps; i++) {
 			inner[i] = out[outer_comps+i] =
-				ac_lds_load(&ctx->ac, lds_inner);
+				ac_lds_load_volatile(&ctx->ac, lds_inner);
 			lds_inner = LLVMBuildAdd(ctx->builder, lds_inner,
 						 LLVMConstInt(ctx->ac.i32, 1, false), "");
 		}
 	}
 
 	/* Convert the outputs to vectors for stores. */
 	vec0 = ac_build_gather_values(&ctx->ac, out, MIN2(stride, 4));
 	vec1 = NULL;
 
 	if (stride > 4)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 9a03311..ff4ea95 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1087,26 +1087,26 @@ static LLVMValueRef lds_load(struct lp_build_tgsi_context *bld_base,
 		for (unsigned chan = 0; chan < TGSI_NUM_CHANNELS; chan++)
 			values[chan] = lds_load(bld_base, type, chan, dw_addr);
 
 		return lp_build_gather_values(&ctx->gallivm, values,
 					      TGSI_NUM_CHANNELS);
 	}
 
 	dw_addr = lp_build_add(&bld_base->uint_bld, dw_addr,
 			    LLVMConstInt(ctx->i32, swizzle, 0));
 
-	value = ac_lds_load(&ctx->ac, dw_addr);
+	value = ac_lds_load_volatile(&ctx->ac, dw_addr);
 	if (tgsi_type_is_64bit(type)) {
 		LLVMValueRef value2;
 		dw_addr = lp_build_add(&bld_base->uint_bld, dw_addr,
 				       ctx->i32_1);
-		value2 = ac_lds_load(&ctx->ac, dw_addr);
+		value2 = ac_lds_load_volatile(&ctx->ac, dw_addr);
 		return si_llvm_emit_fetch_64bit(bld_base, type, value, value2);
 	}
 
 	return bitcast(bld_base, type, value);
 }
 
 /**
  * Store to LDS.
  *
  * \param swizzle	offset (typically 0..3)
@@ -1115,21 +1115,21 @@ static LLVMValueRef lds_load(struct lp_build_tgsi_context *bld_base,
  */
 static void lds_store(struct lp_build_tgsi_context *bld_base,
 		      unsigned dw_offset_imm, LLVMValueRef dw_addr,
 		      LLVMValueRef value)
 {
 	struct si_shader_context *ctx = si_shader_context(bld_base);
 
 	dw_addr = lp_build_add(&bld_base->uint_bld, dw_addr,
 			    LLVMConstInt(ctx->i32, dw_offset_imm, 0));
 
-	ac_lds_store(&ctx->ac, dw_addr, value);
+	ac_lds_store_volatile(&ctx->ac, dw_addr, value);
 }
 
 static LLVMValueRef desc_from_addr_base64k(struct si_shader_context *ctx,
 						  unsigned param)
 {
 	LLVMBuilderRef builder = ctx->ac.builder;
 
 	LLVMValueRef addr = LLVMGetParam(ctx->main_fn, param);
 	addr = LLVMBuildZExt(builder, addr, ctx->i64, "");
 	addr = LLVMBuildShl(builder, addr, LLVMConstInt(ctx->i64, 16, 0), "");
-- 
2.7.4



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