[Mesa-dev] [PATCH 11/20] radeonsi: pass llvm type to si_llvm_emit_fetch_64bit()
Timothy Arceri
tarceri at itsqueeze.com
Fri Nov 10 03:13:45 UTC 2017
---
src/gallium/drivers/radeonsi/si_shader.c | 11 +++++++----
src/gallium/drivers/radeonsi/si_shader_internal.h | 2 +-
src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c | 17 ++++++++++-------
3 files changed, 18 insertions(+), 12 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index efaab0a7a1..33c37d438b 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1057,21 +1057,22 @@ static LLVMValueRef buffer_load(struct lp_build_tgsi_context *bld_base,
return LLVMBuildExtractElement(ctx->ac.builder, value,
LLVMConstInt(ctx->i32, swizzle, 0), "");
}
value = ac_build_buffer_load(&ctx->ac, buffer, 1, NULL, base, offset,
swizzle * 4, 1, 0, can_speculate, false);
value2 = ac_build_buffer_load(&ctx->ac, buffer, 1, NULL, base, offset,
swizzle * 4 + 4, 1, 0, can_speculate, false);
- return si_llvm_emit_fetch_64bit(bld_base, type, value, value2);
+ return si_llvm_emit_fetch_64bit(bld_base, tgsi2llvmtype(bld_base, type),
+ value, value2);
}
/**
* Load from LDS.
*
* \param type output value type
* \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
* \param dw_addr address in dwords
*/
static LLVMValueRef lds_load(struct lp_build_tgsi_context *bld_base,
@@ -1093,21 +1094,22 @@ static LLVMValueRef lds_load(struct lp_build_tgsi_context *bld_base,
dw_addr = lp_build_add(&bld_base->uint_bld, dw_addr,
LLVMConstInt(ctx->i32, swizzle, 0));
value = ac_lds_load(&ctx->ac, dw_addr);
if (tgsi_type_is_64bit(type)) {
LLVMValueRef value2;
dw_addr = lp_build_add(&bld_base->uint_bld, dw_addr,
ctx->i32_1);
value2 = ac_lds_load(&ctx->ac, dw_addr);
- return si_llvm_emit_fetch_64bit(bld_base, type, value, value2);
+ return si_llvm_emit_fetch_64bit(bld_base, tgsi2llvmtype(bld_base, type),
+ value, value2);
}
return bitcast(bld_base, type, value);
}
/**
* Store to LDS.
*
* \param swizzle offset (typically 0..3)
* \param dw_addr address in dwords
@@ -1367,21 +1369,21 @@ static LLVMValueRef fetch_input_gs(
value = ac_build_buffer_load(&ctx->ac, ctx->esgs_ring, 1, ctx->i32_0,
vtx_offset, soffset, 0, 1, 0, true, false);
if (tgsi_type_is_64bit(type)) {
LLVMValueRef value2;
soffset = LLVMConstInt(ctx->i32, (param * 4 + swizzle + 1) * 256, 0);
value2 = ac_build_buffer_load(&ctx->ac, ctx->esgs_ring, 1,
ctx->i32_0, vtx_offset, soffset,
0, 1, 0, true, false);
- return si_llvm_emit_fetch_64bit(bld_base, type,
+ return si_llvm_emit_fetch_64bit(bld_base, tgsi2llvmtype(bld_base, type),
value, value2);
}
return bitcast(bld_base, type, value);
}
static int lookup_interp_param_index(unsigned interpolate, unsigned location)
{
switch (interpolate) {
case TGSI_INTERPOLATE_CONSTANT:
return 0;
@@ -1971,21 +1973,22 @@ static LLVMValueRef fetch_constant(
return lp_build_gather_values(&ctx->gallivm, values, 4);
}
/* Split 64-bit loads. */
if (tgsi_type_is_64bit(type)) {
LLVMValueRef lo, hi;
lo = fetch_constant(bld_base, reg, TGSI_TYPE_UNSIGNED, swizzle);
hi = fetch_constant(bld_base, reg, TGSI_TYPE_UNSIGNED, swizzle + 1);
- return si_llvm_emit_fetch_64bit(bld_base, type, lo, hi);
+ return si_llvm_emit_fetch_64bit(bld_base, tgsi2llvmtype(bld_base, type),
+ lo, hi);
}
idx = reg->Register.Index * 4 + swizzle;
if (reg->Register.Indirect) {
addr = si_get_indirect_index(ctx, ireg, 16, idx * 4);
} else {
addr = LLVMConstInt(ctx->i32, idx * 4, 0);
}
/* Fast path when user data SGPRs point to constant buffer 0 directly. */
diff --git a/src/gallium/drivers/radeonsi/si_shader_internal.h b/src/gallium/drivers/radeonsi/si_shader_internal.h
index 4da39830f6..42cd80216d 100644
--- a/src/gallium/drivers/radeonsi/si_shader_internal.h
+++ b/src/gallium/drivers/radeonsi/si_shader_internal.h
@@ -268,21 +268,21 @@ void si_llvm_context_set_tgsi(struct si_shader_context *ctx,
void si_llvm_create_func(struct si_shader_context *ctx,
const char *name,
LLVMTypeRef *return_types, unsigned num_return_elems,
LLVMTypeRef *ParamTypes, unsigned ParamCount);
void si_llvm_dispose(struct si_shader_context *ctx);
void si_llvm_optimize_module(struct si_shader_context *ctx);
LLVMValueRef si_llvm_emit_fetch_64bit(struct lp_build_tgsi_context *bld_base,
- enum tgsi_opcode_type type,
+ LLVMTypeRef type,
LLVMValueRef ptr,
LLVMValueRef ptr2);
LLVMValueRef si_llvm_emit_fetch(struct lp_build_tgsi_context *bld_base,
const struct tgsi_full_src_register *reg,
enum tgsi_opcode_type type,
unsigned swizzle);
void si_llvm_emit_store(struct lp_build_tgsi_context *bld_base,
const struct tgsi_full_instruction *inst,
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
index b6a919fc8f..d83fa46b9d 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
@@ -401,38 +401,38 @@ get_pointer_into_array(struct si_shader_context *ctx,
LLVMConstInt(ctx->i32,
util_bitcount(array->writemask & ((1 << swizzle) - 1)), 0),
"");
idxs[0] = ctx->i32_0;
idxs[1] = index;
return LLVMBuildGEP(ctx->ac.builder, alloca, idxs, 2, "");
}
LLVMValueRef
si_llvm_emit_fetch_64bit(struct lp_build_tgsi_context *bld_base,
- enum tgsi_opcode_type type,
+ LLVMTypeRef type,
LLVMValueRef ptr,
LLVMValueRef ptr2)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
LLVMValueRef result;
result = LLVMGetUndef(LLVMVectorType(ctx->i32, 2));
result = LLVMBuildInsertElement(ctx->ac.builder,
result,
ac_to_integer(&ctx->ac, ptr),
ctx->i32_0, "");
result = LLVMBuildInsertElement(ctx->ac.builder,
result,
ac_to_integer(&ctx->ac, ptr2),
ctx->i32_1, "");
- return bitcast(bld_base, type, result);
+ return bitcast_llvmtype(ctx, type, result);
}
static LLVMValueRef
emit_array_fetch(struct lp_build_tgsi_context *bld_base,
unsigned File, enum tgsi_opcode_type type,
struct tgsi_declaration_range range,
unsigned swizzle)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
unsigned i, size = range.Last - range.First + 1;
@@ -463,21 +463,22 @@ load_value_from_array(struct lp_build_tgsi_context *bld_base,
LLVMBuilderRef builder = ctx->ac.builder;
LLVMValueRef ptr;
ptr = get_pointer_into_array(ctx, file, swizzle, reg_index, reg_indirect);
if (ptr) {
LLVMValueRef val = LLVMBuildLoad(builder, ptr, "");
if (tgsi_type_is_64bit(type)) {
LLVMValueRef ptr_hi, val_hi;
ptr_hi = LLVMBuildGEP(builder, ptr, &ctx->i32_1, 1, "");
val_hi = LLVMBuildLoad(builder, ptr_hi, "");
- val = si_llvm_emit_fetch_64bit(bld_base, type, val, val_hi);
+ val = si_llvm_emit_fetch_64bit(bld_base, tgsi2llvmtype(bld_base, type),
+ val, val_hi);
}
return val;
} else {
struct tgsi_declaration_range range =
get_array_range(bld_base, file, reg_index, reg_indirect);
LLVMValueRef index =
si_get_indirect_index(ctx, reg_indirect, 1, reg_index - range.First);
LLVMValueRef array =
emit_array_fetch(bld_base, file, type, range, swizzle);
@@ -611,43 +612,44 @@ LLVMValueRef si_llvm_emit_fetch(struct lp_build_tgsi_context *bld_base,
ctx->bld_base.info->processor == PIPE_SHADER_FRAGMENT)
ctx->load_input(ctx, index, &ctx->input_decls[index], input);
else
memcpy(input, &ctx->inputs[index * 4], sizeof(input));
result = input[swizzle];
if (tgsi_type_is_64bit(type)) {
ptr = result;
ptr2 = input[swizzle + 1];
- return si_llvm_emit_fetch_64bit(bld_base, type, ptr, ptr2);
+ return si_llvm_emit_fetch_64bit(bld_base, tgsi2llvmtype(bld_base, type),
+ ptr, ptr2);
}
break;
}
case TGSI_FILE_TEMPORARY:
if (reg->Register.Index >= ctx->temps_count)
return LLVMGetUndef(tgsi2llvmtype(bld_base, type));
ptr = ctx->temps[reg->Register.Index * TGSI_NUM_CHANNELS + swizzle];
if (tgsi_type_is_64bit(type)) {
ptr2 = ctx->temps[reg->Register.Index * TGSI_NUM_CHANNELS + swizzle + 1];
- return si_llvm_emit_fetch_64bit(bld_base, type,
+ return si_llvm_emit_fetch_64bit(bld_base, tgsi2llvmtype(bld_base, type),
LLVMBuildLoad(builder, ptr, ""),
LLVMBuildLoad(builder, ptr2, ""));
}
result = LLVMBuildLoad(builder, ptr, "");
break;
case TGSI_FILE_OUTPUT:
ptr = get_output_ptr(bld_base, reg->Register.Index, swizzle);
if (tgsi_type_is_64bit(type)) {
ptr2 = get_output_ptr(bld_base, reg->Register.Index, swizzle + 1);
- return si_llvm_emit_fetch_64bit(bld_base, type,
+ return si_llvm_emit_fetch_64bit(bld_base, tgsi2llvmtype(bld_base, type),
LLVMBuildLoad(builder, ptr, ""),
LLVMBuildLoad(builder, ptr2, ""));
}
result = LLVMBuildLoad(builder, ptr, "");
break;
default:
return LLVMGetUndef(tgsi2llvmtype(bld_base, type));
}
@@ -666,21 +668,22 @@ static LLVMValueRef fetch_system_value(struct lp_build_tgsi_context *bld_base,
if (tgsi_type_is_64bit(type)) {
LLVMValueRef lo, hi;
assert(swizzle == 0 || swizzle == 2);
lo = LLVMBuildExtractElement(
builder, cval, LLVMConstInt(ctx->i32, swizzle, 0), "");
hi = LLVMBuildExtractElement(
builder, cval, LLVMConstInt(ctx->i32, swizzle + 1, 0), "");
- return si_llvm_emit_fetch_64bit(bld_base, type, lo, hi);
+ return si_llvm_emit_fetch_64bit(bld_base, tgsi2llvmtype(bld_base, type),
+ lo, hi);
}
if (LLVMGetTypeKind(LLVMTypeOf(cval)) == LLVMVectorTypeKind) {
cval = LLVMBuildExtractElement(
builder, cval, LLVMConstInt(ctx->i32, swizzle, 0), "");
} else {
assert(swizzle == 0);
}
return bitcast(bld_base, type, cval);
--
2.14.3
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