[Mesa-dev] [PATCH 05/20] radeonsi: add nir support for ls epilogue

Marek Olšák maraeo at gmail.com
Fri Nov 10 16:49:34 UTC 2017


On Fri, Nov 10, 2017 at 4:13 AM, Timothy Arceri <tarceri at itsqueeze.com> wrote:
> ---
>  src/gallium/drivers/radeonsi/si_shader.c | 37 +++++++++++++++++++-------------
>  1 file changed, 22 insertions(+), 15 deletions(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
> index 47ca64fdea..cc68d0ac6f 100644
> --- a/src/gallium/drivers/radeonsi/si_shader.c
> +++ b/src/gallium/drivers/radeonsi/si_shader.c
> @@ -1106,27 +1106,25 @@ static LLVMValueRef lds_load(struct lp_build_tgsi_context *bld_base,
>         return bitcast(bld_base, type, value);
>  }
>
>  /**
>   * Store to LDS.
>   *
>   * \param swizzle      offset (typically 0..3)
>   * \param dw_addr      address in dwords
>   * \param value                value to store
>   */
> -static void lds_store(struct lp_build_tgsi_context *bld_base,
> +static void lds_store(struct si_shader_context *ctx,
>                       unsigned dw_offset_imm, LLVMValueRef dw_addr,
>                       LLVMValueRef value)
>  {
> -       struct si_shader_context *ctx = si_shader_context(bld_base);
> -
> -       dw_addr = lp_build_add(&bld_base->uint_bld, dw_addr,
> +       dw_addr = lp_build_add(&ctx->bld_base.uint_bld, dw_addr,
>                             LLVMConstInt(ctx->i32, dw_offset_imm, 0));
>
>         ac_lds_store(&ctx->ac, dw_addr, value);
>  }
>
>  static LLVMValueRef desc_from_addr_base64k(struct si_shader_context *ctx,
>                                                   unsigned param)
>  {
>         LLVMBuilderRef builder = ctx->ac.builder;
>
> @@ -1258,21 +1256,21 @@ static void store_output_tcs(struct lp_build_tgsi_context *bld_base,
>         uint32_t writemask = reg->Register.WriteMask;
>         while (writemask) {
>                 chan_index = u_bit_scan(&writemask);
>                 LLVMValueRef value = dst[chan_index];
>
>                 if (inst->Instruction.Saturate)
>                         value = ac_build_clamp(&ctx->ac, value);
>
>                 /* Skip LDS stores if there is no LDS read of this output. */
>                 if (!skip_lds_store)
> -                       lds_store(bld_base, chan_index, dw_addr, value);
> +                       lds_store(ctx, chan_index, dw_addr, value);
>
>                 value = ac_to_integer(&ctx->ac, value);
>                 values[chan_index] = value;
>
>                 if (reg->Register.WriteMask != 0xF && !is_tess_factor) {
>                         ac_build_buffer_store_dword(&ctx->ac, buffer, value, 1,
>                                                     buf_addr, base,
>                                                     4 * chan_index, 1, 0, true, false);
>                 }
>
> @@ -3126,36 +3124,37 @@ static void si_set_es_return_value_for_gs(struct si_shader_context *ctx)
>                                            8 + GFX9_SGPR_GS_SAMPLERS_AND_IMAGES);
>
>         unsigned vgpr = 8 + GFX9_GS_NUM_USER_SGPR;
>         for (unsigned i = 0; i < 5; i++) {
>                 unsigned param = ctx->param_gs_vtx01_offset + i;
>                 ret = si_insert_input_ret_float(ctx, ret, param, vgpr++);
>         }
>         ctx->return_value = ret;
>  }
>
> -static void si_llvm_emit_ls_epilogue(struct lp_build_tgsi_context *bld_base)
> +static void si_llvm_emit_ls_epilogue(struct ac_shader_abi *abi,
> +                                    unsigned max_outputs,
> +                                    LLVMValueRef *addrs)
>  {
> -       struct si_shader_context *ctx = si_shader_context(bld_base);
> +       struct si_shader_context *ctx = si_shader_context_from_abi(abi);
>         struct si_shader *shader = ctx->shader;
>         struct tgsi_shader_info *info = &shader->selector->info;
>         unsigned i, chan;
>         LLVMValueRef vertex_id = LLVMGetParam(ctx->main_fn,
>                                               ctx->param_rel_auto_id);
>         LLVMValueRef vertex_dw_stride = get_tcs_in_vertex_dw_stride(ctx);
>         LLVMValueRef base_dw_addr = LLVMBuildMul(ctx->ac.builder, vertex_id,
>                                                  vertex_dw_stride, "");
>
>         /* Write outputs to LDS. The next shader (TCS aka HS) will read
>          * its inputs from it. */
>         for (i = 0; i < info->num_outputs; i++) {
> -               LLVMValueRef *out_ptr = ctx->outputs[i];
>                 unsigned name = info->output_semantic_name[i];
>                 unsigned index = info->output_semantic_index[i];
>
>                 /* The ARB_shader_viewport_layer_array spec contains the
>                  * following issue:
>                  *
>                  *    2) What happens if gl_ViewportIndex or gl_Layer is
>                  *    written in the vertex shader and a geometry shader is
>                  *    present?
>                  *
> @@ -3169,29 +3168,37 @@ static void si_llvm_emit_ls_epilogue(struct lp_build_tgsi_context *bld_base)
>                  */
>                 if (name == TGSI_SEMANTIC_LAYER ||
>                     name == TGSI_SEMANTIC_VIEWPORT_INDEX)
>                         continue;
>
>                 int param = si_shader_io_get_unique_index(name, index);
>                 LLVMValueRef dw_addr = LLVMBuildAdd(ctx->ac.builder, base_dw_addr,
>                                         LLVMConstInt(ctx->i32, param * 4, 0), "");
>
>                 for (chan = 0; chan < 4; chan++) {
> -                       lds_store(bld_base, chan, dw_addr,
> -                                 LLVMBuildLoad(ctx->ac.builder, out_ptr[chan], ""));
> +                       lds_store(ctx, chan, dw_addr,
> +                                 LLVMBuildLoad(ctx->ac.builder, addrs[4 * i + chan], ""));
>                 }
>         }
>
>         if (ctx->screen->b.chip_class >= GFX9)
>                 si_set_ls_return_value_for_tcs(ctx);
>  }
>
> +static void si_tgsi_emit_ls_epilogue(struct lp_build_tgsi_context *bld_base)
> +{
> +       struct si_shader_context *ctx = si_shader_context(bld_base);
> +
> +       ctx->abi.emit_outputs(&ctx->abi, RADEON_LLVM_MAX_OUTPUTS,
> +                             ctx->outputs[0]);
> +}

This is exactly the same as si_tgsi_emit_epilogue.

Marek


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