[Mesa-dev] [PATCH 1/2] r600/shader: reserve first register of vertex shader.

[Andres Gomez]

Dave, this nominated patch landed without mentioning any specific
stable queue.

>From what I'm seeing, they depend on ea1b97714d9b which didn't make it
for 17.2 so I'm dropping it for that queue.

Let me know what you think.


On Mon, 2017-11-13 at 14:18 +1000, Dave Airlie wrote:
> From: Dave Airlie <airlied at redhat.com>
> 
> r0 in input into vertex shaders contains things like vertexid,
> we need to reserve it even if we have no inputs.
> 
> This fixes a bunch of tessellation piglits.
> ---
>  src/gallium/drivers/r600/r600_shader.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
> index af866c4..c6e4457 100644
> --- a/src/gallium/drivers/r600/r600_shader.c
> +++ b/src/gallium/drivers/r600/r600_shader.c
> @@ -3051,9 +3051,11 @@ static int r600_shader_from_tgsi(struct r600_context *rctx,
>  		ctx.file_offset[i] = 0;
>  	}
>  
> -	if (ctx.type == PIPE_SHADER_VERTEX && ctx.info.num_inputs) {
> +	if (ctx.type == PIPE_SHADER_VERTEX)  {
> +
>  		ctx.file_offset[TGSI_FILE_INPUT] = 1;
> -		r600_bytecode_add_cfinst(ctx.bc, CF_OP_CALL_FS);
> +		if (ctx.info.num_inputs)
> +			r600_bytecode_add_cfinst(ctx.bc, CF_OP_CALL_FS);
>  	}
>  	if (ctx.type == PIPE_SHADER_FRAGMENT) {
>  		if (ctx.bc->chip_class >= EVERGREEN)
-- 
Br,

Andres