[Mesa-dev] [PATCH] i965: Remove DWord length from MI_FLUSH_DW definition

[Nanley Chery]

On Tue, Nov 14, 2017 at 02:52:35PM -0800, Anuj Phogat wrote:
> This fixes the changes introduced in commit 6165fda59b.
> 
> Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
> Cc: <mesa-stable at lists.freedesktop.com>
> Cc: Nanley Chery <nanley.g.chery at intel.com>
> Cc: Kenneth Graunke <kenneth at whitecape.org>
> ---
>  src/mesa/drivers/dri/i965/brw_defines.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 

This patch is
Reviewed-by: Nanley Chery <nanley.g.chery at intel.com>

> diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
> index 26f6ae6b2f..59d9e5cf21 100644
> --- a/src/mesa/drivers/dri/i965/brw_defines.h
> +++ b/src/mesa/drivers/dri/i965/brw_defines.h
> @@ -1430,7 +1430,7 @@ enum brw_pixel_shader_coverage_mask_mode {
>  #define MI_LOAD_REGISTER_IMM		(CMD_MI | (0x22 << 23))
>  #define MI_LOAD_REGISTER_REG		(CMD_MI | (0x2A << 23))
>  
> -#define MI_FLUSH_DW			(CMD_MI | (0x26 << 23) | 2)
> +#define MI_FLUSH_DW			(CMD_MI | (0x26 << 23))
>  
>  #define MI_STORE_REGISTER_MEM		(CMD_MI | (0x24 << 23))
>  # define MI_STORE_REGISTER_MEM_USE_GGTT		(1 << 22)
> -- 
> 2.13.5
> 
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