[Mesa-dev] [PATCH 8/8] radv: enable nir component packing

[Timothy Arceri]

SaschaWillems Vulkan demo tessellation:

~4000fps -> ~4600fps

Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
---
 src/amd/vulkan/radv_pipeline.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 9046960ad2..dad2b035c1 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -1824,20 +1824,21 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
 	unsigned first = MESA_SHADER_STAGES;
 	unsigned last = 0;
 	for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
 		if (!pStages[i])
 			continue;
 		if (first == MESA_SHADER_STAGES)
 			first = i;
 		last = i;
 	}
 
+	int prev = -1;
 	for (unsigned i = 0; i < MESA_SHADER_STAGES; ++i) {
 		const VkPipelineShaderStageCreateInfo *stage = pStages[i];
 
 		if (!modules[i])
 			continue;
 
 		nir[i] = radv_shader_compile_to_nir(device, modules[i],
 						    stage ? stage->pName : "main", i,
 						    stage ? stage->pSpecializationInfo : NULL);
 		pipeline->active_stages |= mesa_to_vk_shader_stage(i);
@@ -1854,20 +1855,25 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
 
 			if (i != first)
 				mask = mask | nir_var_shader_in;
 
 			if (i != last)
 				mask = mask | nir_var_shader_out;
 
 			nir_lower_io_to_scalar_early(nir[i], mask);
 			radv_optimize_nir(nir[i]);
 		}
+
+		if (prev != -1) {
+			nir_compact_varyings(nir[prev], nir[i], true);
+		}
+		prev = i;
 	}
 
 	if (nir[MESA_SHADER_TESS_CTRL]) {
 		nir_lower_tes_patch_vertices(nir[MESA_SHADER_TESS_EVAL], nir[MESA_SHADER_TESS_CTRL]->info.tess.tcs_vertices_out);
 	}
 
 	radv_link_shaders(pipeline, nir);
 
 	for (int i = 0; i < MESA_SHADER_STAGES; ++i) {
 		if (!(device->instance->debug_flags & RADV_DEBUG_DUMP_SHADERS))
-- 
2.14.3