[Mesa-dev] [PATCH] etnaviv: Emit vertex buffers consecutively

[Wladimir J. van der Laan]

On Thu, Nov 23, 2017 at 10:37:15AM +0100, Lucas Stach wrote:
> Am Donnerstag, den 23.11.2017, 10:08 +0100 schrieb Wladimir J. van der Laan:
> > Vertex buffer legacy state is no longer picked up with new drawing
> > commands. Change to use different cases depending on the number of
> > vertex streams in the GPU specs.
> > 
> > This results in slightly more compact state emission as well, on all
> > vivantes.
> > 
> > This needs to go in before "etnaviv: Use only DRAW_INSTANCED on
> > GC3000+"
> > (and thus before the GC7000 patch series).
> 
> Missing Sign-off, otherwise looks good to me:
> 
> Reviewed-by: Lucas Stach <l.stach at pengutronix.de>

Gah, new version below, also w/ a syntax consistency improvement re: likely()
nesting.

Wladimir

>From 1718a7b5911b868d93472cf7fdc9cfe0c8d75067 Mon Sep 17 00:00:00 2001
From: "Wladimir J. van der Laan" <laanwj at gmail.com>
Date: Thu, 23 Nov 2017 08:59:32 +0000
Subject: [PATCH v2] etnaviv: Emit vertex buffers consecutively

Vertex buffer legacy state is no longer picked up with new drawing
commands. Change to use different cases depending on the number of
vertex streams in the GPU specs.

This results in slightly more compact state emission as well, on all
vivantes.

This needs to go in before "etnaviv: Use only DRAW_INSTANCED on GC3000+"
(and thus before the GC7000 patch series).

Signed-off-by: Wladimir J. van der Laan <laanwj at gmail.com>
---
 src/gallium/drivers/etnaviv/etnaviv_emit.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/gallium/drivers/etnaviv/etnaviv_emit.c b/src/gallium/drivers/etnaviv/etnaviv_emit.c
index 999d2ca..2cd2389 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_emit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_emit.c
@@ -391,18 +391,18 @@ etna_emit_state(struct etna_context *ctx)
       /*00644*/ EMIT_STATE_RELOC(FE_INDEX_STREAM_BASE_ADDR, &ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR);
       /*00648*/ EMIT_STATE(FE_INDEX_STREAM_CONTROL, ctx->index_buffer.FE_INDEX_STREAM_CONTROL);
    }
-   if (likely(dirty & (ETNA_DIRTY_VERTEX_BUFFERS))) {
+   if (likely((dirty & (ETNA_DIRTY_VERTEX_BUFFERS)) && ctx->specs.stream_count == 1)) {
       /*0064C*/ EMIT_STATE_RELOC(FE_VERTEX_STREAM_BASE_ADDR, &ctx->vertex_buffer.cvb[0].FE_VERTEX_STREAM_BASE_ADDR);
       /*00650*/ EMIT_STATE(FE_VERTEX_STREAM_CONTROL, ctx->vertex_buffer.cvb[0].FE_VERTEX_STREAM_CONTROL);
    }
    if (likely(dirty & (ETNA_DIRTY_INDEX_BUFFER))) {
       /*00674*/ EMIT_STATE(FE_PRIMITIVE_RESTART_INDEX, ctx->index_buffer.FE_PRIMITIVE_RESTART_INDEX);
    }
-   if (likely(dirty & (ETNA_DIRTY_VERTEX_BUFFERS))) {
-      for (int x = 1; x < ctx->vertex_buffer.count; ++x) {
+   if (likely((dirty & (ETNA_DIRTY_VERTEX_BUFFERS)) && ctx->specs.stream_count > 1)) {
+      for (int x = 0; x < ctx->vertex_buffer.count; ++x) {
          /*00680*/ EMIT_STATE_RELOC(FE_VERTEX_STREAMS_BASE_ADDR(x), &ctx->vertex_buffer.cvb[x].FE_VERTEX_STREAM_BASE_ADDR);
       }
-      for (int x = 1; x < ctx->vertex_buffer.count; ++x) {
+      for (int x = 0; x < ctx->vertex_buffer.count; ++x) {
          if (ctx->vertex_buffer.cvb[x].FE_VERTEX_STREAM_BASE_ADDR.bo) {
             /*006A0*/ EMIT_STATE(FE_VERTEX_STREAMS_CONTROL(x), ctx->vertex_buffer.cvb[x].FE_VERTEX_STREAM_CONTROL);
          }
-- 
2.7.4