[Mesa-dev] [PATCH] i965/vec4: fix splitting of interleaved attributes

Andres Gomez agomez at igalia.com
Thu Nov 23 14:33:01 UTC 2017


On Thu, 2017-11-23 at 09:09 +0100, Iago Toral Quiroga wrote:
> Whe we split an instruction that reads a uniform value
When^                                 an ^

Acked-by: Andres Gomez <agomez at igalia.com>

> (vstride 0) we need to respect the vstride on the second
> half of the instruction (that is, the second half should
> read the same region as the first).
> 
> We were doing this already, but we didn't account for
> stages that have interleaved input attributes which also
> have a vstride of 0 and need the same treatment.
> 
> Fixes the following on Haswell:
> KHR-GL45.enhanced_layouts.varying_locations
> KHR-GL45.enhanced_layouts.varying_array_locations
> KHR-GL45.enhanced_layouts.varying_structure_locations
> ---
>  src/intel/compiler/brw_vec4.cpp | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/src/intel/compiler/brw_vec4.cpp b/src/intel/compiler/brw_vec4.cpp
> index bbe4585e0c..73c40ad600 100644
> --- a/src/intel/compiler/brw_vec4.cpp
> +++ b/src/intel/compiler/brw_vec4.cpp
> @@ -2238,7 +2238,12 @@ vec4_visitor::lower_simd_width()
>              if (linst->src[i].file == BAD_FILE)
>                 continue;
>  
> -            if (!is_uniform(linst->src[i]))
> +            bool is_interleaved_attr =
> +               linst->src[i].file == ATTR &&
> +               stage_uses_interleaved_attributes(stage,
> +                                                 prog_data->dispatch_mode);
> +
> +            if (!is_uniform(linst->src[i]) && !is_interleaved_attr)
>                 linst->src[i] = horiz_offset(linst->src[i], channel_offset);
>           }
>  
-- 
Br,

Andres


More information about the mesa-dev mailing list