[Mesa-dev] [PATCH 40/51] intel/compiler/fs: Prepare 16-bit and/or/xor for 32-bit src

[Topi Pohjolainen]

In GLSL->NIR translation logic operations with boolean typed operands
are treated as operating with integer operands.

The values of the operands therefore can be 0xFFFFFFF/0x0000000 in case
they are produced with 32-bit execution type or 0xFFFF/0x0000 in case of
16-bit.

This patch allows 16-bit logic operations to use 32-bit boolean types
as sources.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/intel/compiler/brw_fs_nir.cpp | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index aff592c354..43127e00e8 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -1127,6 +1127,13 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
       break;
    case nir_op_ixor:
       if (devinfo->gen >= 8) {
+         if (brw_reg_type_to_size(result.type) == 2) {
+            op[0] = subscript(op[0],
+                              brw_reg_type_from_bit_size(16, op[0].type), 0);
+            op[1] = subscript(op[1],
+                              brw_reg_type_from_bit_size(16, op[1].type), 0);
+         }
+
          op[0] = resolve_source_modifiers(op[0]);
          op[1] = resolve_source_modifiers(op[1]);
       }
@@ -1134,6 +1141,13 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
       break;
    case nir_op_ior:
       if (devinfo->gen >= 8) {
+         if (brw_reg_type_to_size(result.type) == 2) {
+            op[0] = subscript(op[0],
+                              brw_reg_type_from_bit_size(16, op[0].type), 0);
+            op[1] = subscript(op[1],
+                              brw_reg_type_from_bit_size(16, op[1].type), 0);
+         }
+
          op[0] = resolve_source_modifiers(op[0]);
          op[1] = resolve_source_modifiers(op[1]);
       }
@@ -1141,6 +1155,13 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
       break;
    case nir_op_iand:
       if (devinfo->gen >= 8) {
+         if (brw_reg_type_to_size(result.type) == 2) {
+            op[0] = subscript(op[0],
+                              brw_reg_type_from_bit_size(16, op[0].type), 0);
+            op[1] = subscript(op[1],
+                              brw_reg_type_from_bit_size(16, op[1].type), 0);
+         }
+
          op[0] = resolve_source_modifiers(op[0]);
          op[1] = resolve_source_modifiers(op[1]);
       }
-- 
2.11.0