[Mesa-dev] [PATCH 43/51] intel/compiler/fs: WIP: Use 32-bit slots for 16-bit uniforms

[Topi Pohjolainen]

---
 src/intel/compiler/brw_fs_nir.cpp | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index 2060a3139d..631bbf7f92 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -4164,7 +4164,11 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
          src.offset = const_offset->u32[0];
 
          for (unsigned j = 0; j < instr->num_components; j++) {
-            bld.MOV(offset(dest, bld, j), offset(src, bld, j));
+            /* Currently 16-bit uniforms occupy 32-bit slot. */
+            const unsigned src_offset =
+               src.type == BRW_REGISTER_TYPE_HF ? 2 * j : j;
+
+            bld.MOV(offset(dest, bld, j), offset(src, bld, src_offset));
          }
       } else {
          fs_reg indirect = retype(get_nir_src(instr->src[0]),
-- 
2.11.0