[Mesa-dev] [PATCH 27/51] intel/compiler/fs: Set tex type for generator to flag fp16

Topi Pohjolainen topi.pohjolainen at gmail.com
Fri Nov 24 12:26:54 UTC 2017


Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/intel/compiler/brw_fs.cpp | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 5751bb0ad7..0d415e2393 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -2601,7 +2601,15 @@ fs_visitor::opt_sampler_eot()
 
    tex_inst->offset |= fb_write->target << 24;
    tex_inst->eot = true;
-   tex_inst->dst = ibld.null_reg_ud();
+
+   /* Set the null destination type specifically so that generator knows to
+    * flag half precision flag.
+    */
+   if (tex_inst->dst.type == BRW_REGISTER_TYPE_HF)
+      tex_inst->dst = ibld.null_reg_hf();
+   else
+      tex_inst->dst = ibld.null_reg_ud();
+
    tex_inst->size_written = 0;
    fb_write->remove(cfg->blocks[cfg->num_blocks - 1]);
 
-- 
2.11.0



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