[Mesa-dev] [PATCH v2 12/17] etnaviv: GC7000: State changes for HALTI3..5

[Wladimir J. van der Laan]

Hello Christian,

On Sat, Nov 25, 2017 at 05:10:36PM +0100, Christian Gmeiner wrote:
> 2017-11-18 10:44 GMT+01:00 Wladimir J. van der Laan <laanwj at gmail.com>:
> > Update state objects to add new state, and emit function to emit new
> > state.
> >
> > Signed-off-by: Wladimir J. van der Laan <laanwj at gmail.com>
> > Reviewed-by: Christian Gmeiner <christian.gmeiner at gmail.com>
> > ---
> >  src/gallium/drivers/etnaviv/etnaviv_emit.c     | 246 +++++++++++++++++++------
> >  src/gallium/drivers/etnaviv/etnaviv_internal.h |   4 +
> >  src/gallium/drivers/etnaviv/etnaviv_state.c    |  35 +++-
> >  src/gallium/drivers/etnaviv/etnaviv_zsa.c      |   3 +-
> >  4 files changed, 216 insertions(+), 72 deletions(-)
> >
> > Conceptually unchanged since v1, but needed serious rebase.
> >
> 
> I had to fix a conflict during git am in etnaviv_emit.c reagrding
> ETNA_DIRTY_VERTEX_BUFFERS.

I assume the conflict is with "etnaviv: Emit vertex buffers consecutively" -
which makes a change to vertex buffer emission, while this moves the surrounding code around.

Need to preserve changes to 0064C/00650 and 00680/006A0:

--- a/src/gallium/drivers/etnaviv/etnaviv_emit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_emit.c
@@ -391,18 +391,18 @@ etna_emit_state(struct etna_context *ctx)
       /*00644*/ EMIT_STATE_RELOC(FE_INDEX_STREAM_BASE_ADDR, &ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR);
       /*00648*/ EMIT_STATE(FE_INDEX_STREAM_CONTROL, ctx->index_buffer.FE_INDEX_STREAM_CONTROL);
    }
-   if (likely(dirty & (ETNA_DIRTY_VERTEX_BUFFERS))) {
+   if (likely((dirty & (ETNA_DIRTY_VERTEX_BUFFERS) && ctx->specs.stream_count == 1))) {
       /*0064C*/ EMIT_STATE_RELOC(FE_VERTEX_STREAM_BASE_ADDR, &ctx->vertex_buffer.cvb[0].FE_VERTEX_STREAM_BASE_ADDR);
       /*00650*/ EMIT_STATE(FE_VERTEX_STREAM_CONTROL, ctx->vertex_buffer.cvb[0].FE_VERTEX_STREAM_CONTROL);
    }
    if (likely(dirty & (ETNA_DIRTY_INDEX_BUFFER))) {
       /*00674*/ EMIT_STATE(FE_PRIMITIVE_RESTART_INDEX, ctx->index_buffer.FE_PRIMITIVE_RESTART_INDEX);
    }
-   if (likely(dirty & (ETNA_DIRTY_VERTEX_BUFFERS))) {
-      for (int x = 1; x < ctx->vertex_buffer.count; ++x) {
+   if (likely((dirty & (ETNA_DIRTY_VERTEX_BUFFERS)) && ctx->specs.stream_count > 1)) {
+      for (int x = 0; x < ctx->vertex_buffer.count; ++x) {
          /*00680*/ EMIT_STATE_RELOC(FE_VERTEX_STREAMS_BASE_ADDR(x), &ctx->vertex_buffer.cvb[x].FE_VERTEX_STREAM_BASE_ADDR);
       }
-      for (int x = 1; x < ctx->vertex_buffer.count; ++x) {
+      for (int x = 0; x < ctx->vertex_buffer.count; ++x) {
          if (ctx->vertex_buffer.cvb[x].FE_VERTEX_STREAM_BASE_ADDR.bo) {
             /*006A0*/ EMIT_STATE(FE_VERTEX_STREAMS_CONTROL(x), ctx->vertex_buffer.cvb[x].FE_VERTEX_STREAM_CONTROL);
          }

If it helps I can send a rebased patch.

Regards,
Wladimir