[Mesa-dev] [PATCH 03/23] radeonsi: move r600_test_dma.c into si_test_dma.c
Marek Olšák
maraeo at gmail.com
Tue Nov 28 21:38:31 UTC 2017
From: Marek Olšák <marek.olsak at amd.com>
---
src/gallium/drivers/radeon/Makefile.sources | 1 -
src/gallium/drivers/radeon/r600_pipe_common.h | 3 ---
src/gallium/drivers/radeonsi/Makefile.sources | 1 +
src/gallium/drivers/radeonsi/meson.build | 1 +
src/gallium/drivers/radeonsi/si_pipe.c | 2 +-
src/gallium/drivers/radeonsi/si_pipe.h | 3 +++
.../r600_test_dma.c => radeonsi/si_test_dma.c} | 28 +++++++++++-----------
7 files changed, 20 insertions(+), 19 deletions(-)
rename src/gallium/drivers/{radeon/r600_test_dma.c => radeonsi/si_test_dma.c} (93%)
diff --git a/src/gallium/drivers/radeon/Makefile.sources b/src/gallium/drivers/radeon/Makefile.sources
index ebb194c..b756d72 100644
--- a/src/gallium/drivers/radeon/Makefile.sources
+++ b/src/gallium/drivers/radeon/Makefile.sources
@@ -1,20 +1,19 @@
C_SOURCES := \
r600_buffer_common.c \
r600_cs.h \
r600_gpu_load.c \
r600_perfcounter.c \
r600_pipe_common.c \
r600_pipe_common.h \
r600_query.c \
r600_query.h \
- r600_test_dma.c \
r600_texture.c \
radeon_uvd.c \
radeon_uvd.h \
radeon_vcn_dec.c \
radeon_vcn_dec.h \
radeon_vcn_enc_1_2.c \
radeon_vcn_enc.c \
radeon_vcn_enc.h \
radeon_vce_40_2_2.c \
radeon_vce_50.c \
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index 36df0c4..a1ec0b8 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -713,23 +713,20 @@ unsigned si_end_counter(struct r600_common_screen *rscreen, unsigned type,
/* r600_perfcounters.c */
void si_perfcounters_destroy(struct r600_common_screen *rscreen);
/* r600_query.c */
void si_init_screen_query_functions(struct r600_common_screen *rscreen);
void si_init_query_functions(struct r600_common_context *rctx);
void si_suspend_queries(struct r600_common_context *ctx);
void si_resume_queries(struct r600_common_context *ctx);
-/* r600_test_dma.c */
-void si_test_dma(struct r600_common_screen *rscreen);
-
/* r600_texture.c */
bool si_prepare_for_dma_blit(struct r600_common_context *rctx,
struct r600_texture *rdst,
unsigned dst_level, unsigned dstx,
unsigned dsty, unsigned dstz,
struct r600_texture *rsrc,
unsigned src_level,
const struct pipe_box *src_box);
void si_texture_get_fmask_info(struct r600_common_screen *rscreen,
struct r600_texture *rtex,
diff --git a/src/gallium/drivers/radeonsi/Makefile.sources b/src/gallium/drivers/radeonsi/Makefile.sources
index 18cd7d1..10c99f6 100644
--- a/src/gallium/drivers/radeonsi/Makefile.sources
+++ b/src/gallium/drivers/radeonsi/Makefile.sources
@@ -29,11 +29,12 @@ C_SOURCES := \
si_shader_tgsi_mem.c \
si_shader_tgsi_setup.c \
si_state.c \
si_state_binning.c \
si_state_draw.c \
si_state_msaa.c \
si_state_shaders.c \
si_state_streamout.c \
si_state_viewport.c \
si_state.h \
+ si_test_dma.c \
si_uvd.c
diff --git a/src/gallium/drivers/radeonsi/meson.build b/src/gallium/drivers/radeonsi/meson.build
index a04ea4c..7eae9d6 100644
--- a/src/gallium/drivers/radeonsi/meson.build
+++ b/src/gallium/drivers/radeonsi/meson.build
@@ -45,20 +45,21 @@ files_libradeonsi = files(
'si_shader_tgsi_mem.c',
'si_shader_tgsi_setup.c',
'si_state.c',
'si_state_binning.c',
'si_state_draw.c',
'si_state_msaa.c',
'si_state_shaders.c',
'si_state_streamout.c',
'si_state_viewport.c',
'si_state.h',
+ 'si_test_dma.c',
'si_uvd.c',
)
si_driinfo_h = custom_target(
'si_driinfo.h',
input : files(
'../../../util/merge_driinfo.py',
'../../auxiliary/pipe-loader/driinfo_gallium.h', 'driinfo_radeonsi.h'
),
output : 'si_driinfo.h',
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index f0a9ad1..bf28677 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -1151,19 +1151,19 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws,
for (i = 0; i < num_compiler_threads; i++)
sscreen->tm[i] = si_create_llvm_target_machine(sscreen);
for (i = 0; i < num_compiler_threads_lowprio; i++)
sscreen->tm_low_priority[i] = si_create_llvm_target_machine(sscreen);
/* Create the auxiliary context. This must be done last. */
sscreen->b.aux_context = si_create_context(&sscreen->b.b, 0);
if (sscreen->b.debug_flags & DBG(TEST_DMA))
- si_test_dma(&sscreen->b);
+ si_test_dma(sscreen);
if (sscreen->b.debug_flags & (DBG(TEST_VMFAULT_CP) |
DBG(TEST_VMFAULT_SDMA) |
DBG(TEST_VMFAULT_SHADER)))
si_test_vmfault(sscreen);
return &sscreen->b.b;
}
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 820e5b2..c0846f4 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -633,20 +633,23 @@ void si_context_gfx_flush(void *context, unsigned flags,
struct pipe_fence_handle **fence);
void si_begin_new_cs(struct si_context *ctx);
void si_need_cs_space(struct si_context *ctx);
/* si_compute.c */
void si_init_compute_functions(struct si_context *sctx);
/* si_perfcounters.c */
void si_init_perfcounters(struct si_screen *screen);
+/* si_test_dma.c */
+void si_test_dma(struct si_screen *sscreen);
+
/* si_uvd.c */
struct pipe_video_codec *si_uvd_create_decoder(struct pipe_context *context,
const struct pipe_video_codec *templ);
struct pipe_video_buffer *si_video_buffer_create(struct pipe_context *pipe,
const struct pipe_video_buffer *tmpl);
/* si_viewport.c */
void si_update_vs_viewport_state(struct si_context *ctx);
void si_init_viewport_functions(struct si_context *ctx);
diff --git a/src/gallium/drivers/radeon/r600_test_dma.c b/src/gallium/drivers/radeonsi/si_test_dma.c
similarity index 93%
rename from src/gallium/drivers/radeon/r600_test_dma.c
rename to src/gallium/drivers/radeonsi/si_test_dma.c
index f7002bc..beb3be5 100644
--- a/src/gallium/drivers/radeon/r600_test_dma.c
+++ b/src/gallium/drivers/radeonsi/si_test_dma.c
@@ -17,21 +17,21 @@
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
*/
/* This file implements randomized SDMA texture blit tests. */
-#include "r600_pipe_common.h"
+#include "si_pipe.h"
#include "util/u_surface.h"
#include "util/rand_xor.h"
static uint64_t seed_xorshift128plus[2];
#define RAND_NUM_SIZE 8
/* The GPU blits are emulated on the CPU using these CPU textures. */
struct cpu_texture {
@@ -128,24 +128,24 @@ static enum pipe_format get_format_from_bpp(int bpp)
case 8:
return PIPE_FORMAT_R32G32_UINT;
case 16:
return PIPE_FORMAT_R32G32B32A32_UINT;
default:
assert(0);
return PIPE_FORMAT_NONE;
}
}
-static const char *array_mode_to_string(struct r600_common_screen *rscreen,
+static const char *array_mode_to_string(struct si_screen *sscreen,
struct radeon_surf *surf)
{
- if (rscreen->chip_class >= GFX9) {
+ if (sscreen->b.chip_class >= GFX9) {
/* TODO */
return " UNKNOWN";
} else {
switch (surf->u.legacy.level[0].mode) {
case RADEON_SURF_MODE_LINEAR_ALIGNED:
return "LINEAR_ALIGNED";
case RADEON_SURF_MODE_1D:
return "1D_TILED_THIN1";
case RADEON_SURF_MODE_2D:
return "2D_TILED_THIN1";
@@ -164,25 +164,25 @@ static unsigned generate_max_tex_side(unsigned max_tex_side)
return max_tex_side;
case 1:
/* Try to hit 1D tiling in 1/4 of the cases. */
return 128;
default:
/* Try to hit common sizes in 2/4 of the cases. */
return 2048;
}
}
-void si_test_dma(struct r600_common_screen *rscreen)
+void si_test_dma(struct si_screen *sscreen)
{
- struct pipe_screen *screen = &rscreen->b;
+ struct pipe_screen *screen = &sscreen->b.b;
struct pipe_context *ctx = screen->context_create(screen, NULL, 0);
- struct r600_common_context *rctx = (struct r600_common_context*)ctx;
+ struct si_context *sctx = (struct si_context*)ctx;
uint64_t max_alloc_size;
unsigned i, iterations, num_partial_copies, max_levels, max_tex_side;
unsigned num_pass = 0, num_fail = 0;
max_levels = screen->get_param(screen, PIPE_CAP_MAX_TEXTURE_2D_LEVELS);
max_tex_side = 1 << (max_levels - 1);
/* Max 128 MB allowed for both textures. */
max_alloc_size = 128 * 1024 * 1024;
@@ -276,44 +276,44 @@ void si_test_dma(struct r600_common_screen *rscreen)
assert(src);
assert(dst);
rdst = (struct r600_texture*)dst;
rsrc = (struct r600_texture*)src;
alloc_cpu_texture(&src_cpu, &tsrc, bpp);
alloc_cpu_texture(&dst_cpu, &tdst, bpp);
printf("%4u: dst = (%5u x %5u x %u, %s), "
" src = (%5u x %5u x %u, %s), bpp = %2u, ",
i, tdst.width0, tdst.height0, tdst.array_size,
- array_mode_to_string(rscreen, &rdst->surface),
+ array_mode_to_string(sscreen, &rdst->surface),
tsrc.width0, tsrc.height0, tsrc.array_size,
- array_mode_to_string(rscreen, &rsrc->surface), bpp);
+ array_mode_to_string(sscreen, &rsrc->surface), bpp);
fflush(stdout);
/* set src pixels */
set_random_pixels(ctx, src, &src_cpu);
/* clear dst pixels */
- rctx->clear_buffer(ctx, dst, 0, rdst->surface.surf_size, 0, true);
+ sctx->b.clear_buffer(ctx, dst, 0, rdst->surface.surf_size, 0, true);
memset(dst_cpu.ptr, 0, dst_cpu.layer_stride * tdst.array_size);
/* preparation */
max_width = MIN2(tsrc.width0, tdst.width0);
max_height = MIN2(tsrc.height0, tdst.height0);
max_depth = MIN2(tsrc.array_size, tdst.array_size);
num = do_partial_copies ? num_partial_copies : 1;
for (j = 0; j < num; j++) {
int width, height, depth;
int srcx, srcy, srcz, dstx, dsty, dstz;
struct pipe_box box;
- unsigned old_num_draw_calls = rctx->num_draw_calls;
- unsigned old_num_dma_calls = rctx->num_dma_calls;
+ unsigned old_num_draw_calls = sctx->b.num_draw_calls;
+ unsigned old_num_dma_calls = sctx->b.num_dma_calls;
if (!do_partial_copies) {
/* copy whole src to dst */
width = max_width;
height = max_height;
depth = max_depth;
srcx = srcy = srcz = dstx = dsty = dstz = 0;
} else {
/* random sub-rectangle copies from src to dst */
@@ -354,25 +354,25 @@ void si_test_dma(struct r600_common_screen *rscreen)
!rdst->surface.is_linear &&
rand() % 4 == 0) {
srcx = 0;
srcy = 0;
srcz = 0;
}
}
/* GPU copy */
u_box_3d(srcx, srcy, srcz, width, height, depth, &box);
- rctx->dma_copy(ctx, dst, 0, dstx, dsty, dstz, src, 0, &box);
+ sctx->b.dma_copy(ctx, dst, 0, dstx, dsty, dstz, src, 0, &box);
/* See which engine was used. */
- gfx_blits += rctx->num_draw_calls > old_num_draw_calls;
- dma_blits += rctx->num_dma_calls > old_num_dma_calls;
+ gfx_blits += sctx->b.num_draw_calls > old_num_draw_calls;
+ dma_blits += sctx->b.num_dma_calls > old_num_dma_calls;
/* CPU copy */
util_copy_box(dst_cpu.ptr, tdst.format, dst_cpu.stride,
dst_cpu.layer_stride,
dstx, dsty, dstz, width, height, depth,
src_cpu.ptr, src_cpu.stride,
src_cpu.layer_stride,
srcx, srcy, srcz);
}
--
2.7.4
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